Page 170 - Hardware Implementation of Finite-Field Arithmetic

m
Operations over GF ( p ) 153

with final select inv_input <= b(0) when ‘0’, a(0) when
others;
inverter1: mod_239_inverter port map(clk, inv_input,
inv_ab);
multiplier1: mod_239_multiplier port map(a(0), inv_ab,
coef);
multipliers2: for i in 0 to m-1 generate
a_multiplier: mod_239_multiplier
port map(coef, b(i), coef_by_b(i));
end generate;
coef_by_b(m) <= conv_std_logic_vector(0, k);
subtractor1: for i in 0 to m generate
sub1: subtractor port map(a(i), coef_by_b(i), ab(i));
end generate;
divide_by_x1: for i in 0 to m-2 generate
b_div_x(i) <= b(i+1);
end generate;
b_div_x(m-1) <= conv_std_logic_vector(0, k);
divide_by_x2: for i in 0 to m-1 generate
ab_div_x(i) <= ab(i+1);
end generate;
with sel_bd select next_b <= b_div_x when ‘0’, ab_div_x
when others;
with final select mult_in <= coef when ‘0’, inv_ab when
others;
with final select c_or_d <= d when ‘0’, c when others;
multipliers3: for i in 0 to m-1 generate
a_second_multiplier: mod_239_multiplier
port map(mult_in, c_or_d(i), coef_by_cd(i));
end generate;
z <= coef_by_cd;
subtractor2: for i in 0 to m-1 generate
sub2: subtractor port map(c(i), coef_by_cd(i),
cd(i));
end generate;
with sel_bd select w <= d when ‘0’, cd when others;
multipliers4: for i in 0 to m generate
a_third_multiplier: mod_239_multiplier
port map(w(0), inv_f0_by_f(i), subtractor_input(i));
end generate;
subtractor3: for i in 0 to m-1 generate
sub3: subtractor port map(w(i), subtractor_input(i),
subtractor3_output(i));
end generate;
w_m <= conv_std_logic_vector(0, k);
sub4: subtractor
port map(w_m, subtractor_input(m),
subtractor3_output(m));
divide_by_x3: for i in 0 to m-1 generate
next_d(i) <= subtractor3_output(i+1);
end generate;
registers_ac: process(clk)
begin