Page 357 - Hardware Implementation of Finite-Field Arithmetic

APPENDIX D

Ada versus VHDL

he programming language Ada is used for describing most of
the algorithms presented in this book. The reason for choosing
TAda instead of C was the similarity between the Ada and
VHDL syntaxes. The definition of VHDL has been widely inspired by
Ada due to the fact that an electronic circuit is a real-time system all
of whose components are working concurrently, and Ada was the
“par excellence” language for programming concurrent systems. The
reader of this book is assumed to be an electronic circuit designer,
with some experience in the use of hardware description languages.
His/her effort for understanding short and simple Ada procedures
should be minimal. As a matter of fact, a simple Ada procedure is
very similar to a VHDL procedure.
This appendix presents some of the differences between Ada and
VHDL procedures.
Consider the first algorithm of Chap. 2, that is, Algorithm 2.1, and
define the function quotient as follows [Eq. (2.13)]:
quotient(s, y) = −1 if s < 0 quotient(s, y) = 1 if s ≥ 0

It corresponds to the nonrestoring algorithm of Sec. 2.1.2.
The following VHDL procedure describes the corresponding
reduction algorithm:

Algorithm D.1—VHDL version
procedure nr_reducer(m, x: in integer; z: inout integer)
is
function quotient(s: in integer; y: in natural) return
integer is
begin
if s < 0 then return -1; else return 1; end if;
end quotient;
variable y, s, r: integer;
begin
y := m*(2**(n-k));
s := x;
for i in 0 to n-k loop
if quotient(s,y) = 1 then r := s - y;
elsif quotient(s,y) = 0 then r := s;
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