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58                                              Chapter 3 Addressing Modes


        3.1 OP Code Byte Addressing Modes

        This section discusses addressing that is selected in the opcode byte, which is generally
        the first byte of the instruction. We have already introduced this idea in an ad hoc manner
        in Chapter 1 when we discussed implied, immediate, and direct addressing. Now we add
        page zero addressing and explain when each address mode should be used.
            Some instructions do not involve any address from memory for an operand or a
        result. One way to avoid going to memory is to use only registers for all the operands.
        The DEC instruction decrements (subtracts one from) the value in an accumulator so that
        DECA and DECS are really the same operation, with the registers A and B serving as the
        addresses for the operand and result. Motorola considers DECA and DECB to be different
        instructions, whereas other manufacturers would call them the same instruction with a
        register address that indicates which register is used. Either case has some merits, but we
        will use Motorola's convention.
            There is also an instruction

                                        DEC 100

        that recalls the word at location 100, decrements that word, and writes the result in
        location 100. That instruction uses direct addressing (as discussed in Chapter 1), whereas
        DECA does not use direct addressing. Because the instruction mnemonic for instructions
        such as DECA makes it clear which registers are being used, at least for simple
        instructions, Motorola calls this type of addressing inherent or implied. It is a zero-
        level mode. For instance, CLRA clears accumulator A (puts its contents to zero) and uses
        inherent addressing, whereas

                                       CLR 1000

        clears the word at location 1000 and uses direct addressing. Several other instructions,
        such as SWI and BGND, which we are using as a halt instruction, have been included in
        the inherent category because the operation code byte of the instruction contains all of
        the addressing information necessary for the execution of the instruction.
            We have used the immediate addressing mode in Chapter 1, where the value of the
        operand is part of the instruction, as in

                                       LDAA #67

        which puts the number 67 into accumulator A. We use the adjective "immediate" because
        when the instruction is being fetched from memory the program counter contains the
        address of the operand, and no further memory reads beyond those required for the
        instruction bytes are necessary to get its value.
            You should use inherent addressing wherever it will shorten the program storage or
        speed up its execution, for example, by keeping the most frequently used data in registers
        as long as possible. Their use will involve only inherent addressing. Immediate
        addressing should be used to initialize registers with constants or provide constants for
        other instructions, such as ADDA.
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