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Materials for Microelectromechanical Systems                                                2-9


             surface-to-volume ratio also permits the use of porous Si as the starting material for the formation of
             thick thermal oxides, as the proper pore size can be selected to account for the volume expansion of the
             thermal oxide. When single-crystal substrates are used in the formation of porous Si films, the unetched
             material remains single crystalline, thus providing the appropriate template for epitaxial growth. It has
             been shown that CVD coatings will not penetrate the porous regions but, rather, overcoat the pores at the
             surface [Lang et al., 1995]. The formation of localized surface-micromachinable Si on insulator structures
             is possible by simply combining electrochemical etching, epitaxial growth, dry etching (to create access
             holes), and thermal oxidation. A third MEMS-related application is the direct use of porous Si as a sacri-
             ficial layer in polysilicon and single-crystalline Si surface micromachining. The process involves the elec-
             trical isolation of the structural Si layer either by the formation of pn-junctions through selective doping
             or by use of electrically insulating thin films [Lang, 1995]. In essence the formation of pores occurs only
             on electrically charged surfaces. A weak Si etchant aggressively attacks the porous regions with little dam-
             age to the structural Si layers. Porous Si may be an attractive option for micromachining processes that
             are chemically stable in HF but are tolerant of high-temperature processing steps.
               With the possible exception of porous Si, all of these processes to prepare polysilicon for MEMS appli-
             cations utilize substrate temperatures in excess of 570°C, either during film deposition or in subsequent
             stress-relieving annealing steps. Such high-temperature processing restricts the use of non-Si derivative
             materials, such as aluminum for metallization and polymers for sacrificial layers, both of which are rela-
             tively straightforward to deposit and pattern and would be of great benefit to polysilicon micromachin-
             ing  if they  could  be  used  throughout  the  process. Work  in  developing  low-temperature  deposition
             processes for polysilicon has focused on sputter deposition techniques [Abe and Reed, 1996; Honer and
             Kovacs, 2000]. Early work [Abe and Reed, 1996] emphasized the ability to deposit very smooth (25-Å
             roughness average) films at reasonable deposition rates (191 Å/min) and with low residual compressive
             stresses. The process involved DC magnitron sputtering from a Si target using an Ar sputtering gas, a
             chamber pressure of 5 mtorr, and a power of 100W. The substrates consisted of thermally oxidized Si
             wafers. The authors reported that a postdeposition anneal at 700°C in N for 2 hr was performed to crys-
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             tallize the deposited film and perhaps lower the stress. A second group [Honer and Kovacs, 2000] sought
             to  develop  a  polymer-friendly  Si-based  surface-micromachining  process. The  Si  films  were  sputter-
             deposited on polyimide sacrificial layers. To improve the conductivity of the micromachined Si struc-
             tures, the sputtered Si films were sandwiched between two TiW cladding layers. The device structures
             were released by etching the polyimide in a O plasma. The processing step with the highest temperature
                                                      2
             was the polyimide cure, which was performed for 1hr at 350°C. To test the robustness of the process,
             sputter-deposited  Si  microstructures  were  fabricated  on  substrates  containing  CMOS  devices. As
             expected from thermal budget considerations, the authors reported no measurable degradation of device
             performance.



             2.4    Silicon Dioxide


             SiO can be grown thermally on Si substrates as well as deposited using a variety of processes to satisfy a
                2
             wide range of different requirements. In polysilicon surface micromachining, SiO is used as a sacrificial
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             material, as it can be dissolved easily using etchants that do not attack polysilicon. In a less prominent
             role, SiO is used as an etch mask for dry etching of thick polysilicon films because it is chemically resist-
                     2
             ant to dry polysilicon etch chemistries.
               The SiO growth and deposition processes most widely used in polysilicon surface micromachining are
                       2
             thermal oxidation and LPCVD. Thermal oxidation of Si is performed at high temperatures (e.g., 900 to
             1000°C) in the presence of oxygen or steam. Because thermal oxidation is a self-limiting process (i.e., the
             oxide growth rate decreases with increasing film thickness), the maximum practical film thickness that
             can be obtained is about 2 µm, which for many sacrificial applications is sufficient.
               SiO films for MEMS applications can also be deposited using an LPCVD process known as low-
                  2
             temperature oxidation (LTO). In general, LPCVD provides a means for depositing thick ( 2µm) SiO
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