Page 140 - A Practical Guide from Design Planning to Manufacturing

Computer Architecture 113

TABLE 4-15 Branch Condition Testing
Type Evaluation Example architecture
Condition code Test implicit flag bits x86, PowerPC, SPARC
Condition register Test explicit register EPIC
Compare and branch Compare two registers to each other PA-RISC, VAX

However, this approach does require more registers. Some architectures
provide a combined compare and branch instruction that performs the
comparison and switches control flow all in one instruction. This eliminates
the need for either condition codes or using condition registers but makes
the execution of a single branch instruction more complex.
All control flow instructions must also have a way to specify the
address of the target instruction to which control is being transferred.
The common methods are listed in Table 4-16.
Absolute mode includes the target address in the control flow instruc-
tion as a constant. This works well for destination instructions with a
known address during compilation. If the target address is not known
during compilation, register indirect mode allows it to be written to a
register at run time.
The most common control flow addressing mode is IP relative address-
ing. The vast majority of control flow instructions have targets that are
very close to themselves. It is far more common to jump over a few
dozen instructions than millions. As a result, the typical size of the con-
stant needed to specify the target address is dramatically reduced if it
represents only the distance from branch to target. In IP relative
addressing, the constant is added to the current instruction pointer to
generate the target address.
Return instructions commonly make use of stack addressing, assum-
ing that the call instruction has placed the target address on the stack.
This way the same procedure can be called from many different locations
within a program and always return to the appropriate point.
Finally, software interrupt instructions typically specify a constant
that is used as an index into a global table of target addresses stored in

TABLE 4-16 Control Flow Addressing Modes
Address mode Address Typical use
Absolute Const Target known at compile time
Register Indirect Reg Target unknown at compile time
IP Relative IP + Const Relative target known at compile time
Stack Stack Procedure returns
Global Lookup Interrupt Table + Const Software interrupts