Page 142 - A Practical Guide from Design Planning to Manufacturing

Computer Architecture 115

Trap exceptions are caused by events that cannot be easily fixed but
do not prevent continued execution. They return to the next instruction
after the cause of the exception. A trap handler for a divide by 0 might
print a warning message or set a variable to be checked later, but there
is no sense in retrying the divide. Abort exceptions occur when the exe-
cution can no longer continue. Attempting to execute invalid instruc-
tions, for example, would indicate that something had gone very wrong
with the program and make the correct next action unclear. An excep-
tion handler could gather information about what had gone wrong before
shutting down the program.

Instruction Encoding
Once the types of operations and operands are chosen, a scheme for
encoding these instructions as binary values must be decided upon.
How an architecture encodes its instructions has a tremendous impact
on future implementations.
Instruction fields to be encoded are as follows:
Operation
Register sources and destinations
Computation immediates
Data address and address mode
Control address and address mode

Every instruction must have an opcode, which determines the par-
ticular type of operation. To keep code size to a minimum, the opcode
should only be as many bits as are needed for the number of instructions,
but running out of opcodes can be deadly for any architecture. Successful
architectures inevitably end up needing to add new instructions as
implementations and applications change. Any prudent architect will
reserve some number of opcodes when the architecture is first defined
in order to allow for later extensions.
A common tactic to keep opcodes small is to use a single opcode for a
whole class of instructions that do not use all the other fields in the
instruction encoding. The unused fields are then be used as extended
opcodes to determine the precise operation. For example, if arithmetic
instructions never use memory addresses, then a single opcode could be
used for all of them, and the address field used to distinguish between
the different types of arithmetic instructions.
Each explicit register source or destination must be encoded in the
instruction. The number of architecturally defined registers determines
the number of bits needed. More registers can improve performance by