Page 143 - A Practical Guide from Design Planning to Manufacturing

116 Chapter Four

reducing the number of loads and stores needed and by allowing for more
instruction reordering. However, more sophisticated compilers are
required to make use of more registers and a large number of registers
will increase the instruction size. Doubling the number of registers
increases the needed register address size by 1 bit. For an instruction
with two source registers and one destination register encoded as 32 bits,
this would be about a 10 percent increase in code size.
Many computations are performed on constants that can be encoded
in the instruction as immediate values. This prevents the need to keep
the immediate value in a separate memory location and perhaps elim-
inates a load command to move it to a register. The more bits that are
available for immediates, the larger the immediate values that can be
represented. Luckily most immediates are relatively small with typically
75 percent represented in less than 16 bits. 7
Any instruction that accesses memory must encode the data address
as well as what addressing mode should be used to interpret the address.
Larger address constants enable memory accesses to a larger portion
of memory without having to use registers to store addresses. More
addressing modes allow more flexibility in how addresses are generated.
However, both of these will lead to larger instruction sizes, especially
in cases where a single instruction may have multiple memory operands.
Control flow instructions must specify the address of the target
instruction and possibly an addressing mode. If the number of address-
ing modes is small, it may be encoded as part of the opcode. Using IP
relative addressing, an 8-bit offset is sufficient for about 90 percent of
8
branches. The remaining 10 percent may be converted by the compiler
into a shorter branch that executes or skips an unconditional jump to
the desired instruction.
Architectures can encode all their instructions to be the same number
of bits or use encodings of fewer bits for more common instructions.
Code size is improved by allowing variable length instructions. This
textbook would become much longer if every word had to be the same
number of characters. Real world languages like English inevitably use
fewer characters on average for common words, which allows more words
overall in the same number of total characters. However, variable
length instructions make instruction decode more difficult, especially for
processors that attempt to read multiple instructions simultaneously.
Fixed length instructions are simpler to work with since the beginning
of the next instruction is known even before the current instruction is

7
ibid., 102.
8
ibid., 163.