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Computer Architecture 117

Opcode(6) Reg(5) Reg(5) Reg(5) OpExt(11) 3-Operand instruction

Opcode(6) Reg(5) Reg(5) Immediate(16) 2-Operand instruction

Opcode(6) Reg(5) Pos(5) CC(5) Offset(11) Branch/Jump

Fixed instruction width (32 bits)
Figure 4-4 Example instruction encodings.

decoded. The disadvantage is the more memory space will be required
to encode the same number of instructions. The instruction encodings
for a fixed 32-bit instruction length pure register architecture might look
like those shown in Fig. 4-4.
The example in Fig. 4-4 shows three basic instruction formats and the
number of bits used to encode each field. The three-operand format
could be used for computation instructions that specify a destination reg-
ister and two source registers. The register fields are 5 bits wide, set-
ting a limit of 32 architectural registers. An 11-bit opcode extension
would allow a single opcode to be used for all instructions of this type
and the specific operation to be encoded in this field.
The two-operand format could be used for computation instructions
that include an immediate value as a source instead of two source reg-
isters. This same format could be used for loads and stores where the
first register field points to the source or destination register, and the
second register field specifies a register to be added to the immediate
value to form the address.
The branch/jump format allows the register addressed by the first field
to be tested in order to determine if the branch should be taken or not.
The Pos field specifies the position of the bit to be tested; the condition
to be tested is specified by the CC field. The offset field provides an 11-bit
offset from the current instruction pointer to the target address. If the
opcode indicates a jump, only the first register field would be used. This
would specify the register containing the target address, and the remain-
ing fields would be ignored.
This simple example shows how added bits for any one field must come
at the expense of simplifying other fields or increasing instruction size.
A few long instruction formats may not be particularly significant for
architectures that support variable length instructions, but for fixed
length architectures, growing any type instructions requires increasing
the size of all instructions.