Page 261 - A Practical Guide from Design Planning to Manufacturing

Circuit Design 233

An application that has very few dependencies and very few cache misses
will be able to schedule many instructions in parallel and achieve high
average activity and high power. An application that has long stalls for
memory accesses or other dependencies will have much lower activity and
power. Average node activity can be reduced by careful logic design includ-
ing clock gating. Clock gating uses added logic to stop clock signals from
switching when not needed. For example, when running an application
that performs no floating-point operations, most of the clocks in the
floating-point blocks of the processor can be switched off. Clock gating adds
logic complexity but can significantly reduce active power.
The term C total includes the capacitance of all the processor nodes that
could switch. C total tends to scale with the linear dimensions of the fab-
rication process, so compacting a processor design onto the new process
generation and making no changes reduces this component of active
power. However, adding more transistors for added functionality will
increase the total switching capacitance. Circuit designers can reduce
C total by using smaller-width transistors. Unfortunately these smaller
transistors will tend to switch more slowly. Eventually the maximum
processor frequency will be affected. Careful circuit design can save
power by reducing transistor widths only on circuit paths that are not
limiting the processor frequency. Paths with maxdelay margin are wast-
ing power by running faster than needed. Of course, it is impossible to
make all the circuit paths the exact same speed, but neither should every
path be sized for minimum delay.
The voltage and frequency of operation have a large impact on active
power. The voltage of the processor impacts the speed that transistors
switch, so it is not possible to reduce voltage without reducing frequency,
but operating at reduced voltage and frequency is much more power effi-
cient. The power savings of scaling voltage and frequency together are
so large, that many processors are now designed to dynamically scale
their voltage and frequency while running. This allows the processor to
operate at maximum frequency and at maximum power when required
by the workload, and to run at lower power when the processor is not
being fully utilized. Transmeta was one of the first companies to imple-
ment this feature in their processors, calling it LongRun TM power man-
®
agement. In AMD processors, this ability is called Cool’n’Quiet , and in
®
Intel processors it is called SpeedStep technology.
In addition to the active power caused by switching, the leakage currents
of modern processors also contribute significantly to power. Leakage
) is determined by the leaking transistor width and the
power (P leakage
leakage current per width (I perW).
off
×
P leakage = total width stacking factor × I perW × V dd
r
off