Page 10 - Phase-Locked Loops Design, Simulation, and Applications
P. 10

Source : Phase-Locked Loops: Design, Simulation, and Applications, Sixth
                  Edition   Ronald E. Best                                                            9




                 Mixed-Signal PLL Building Blocks




                 Block Diagram of the Mixed-Signal PLL

                 As mentioned in Sec. 1.3, the mixed-signal PLL includes circuits that are hybrids of both
                 linear and digital circuits. To see which parts of the system are linear and which are
                 digital, consider the general block diagram in Fig. 2.1.
                   As shown in  Sec. 1.1, every PLL consists  of the three blocks  phase detector,  loop
                 filter, and VCO (voltage-controlled oscillator). When the PLL is used as a frequency
                 synthesizer, another block is added: a divide-by-N counter. Assuming the counter divides
                 by a factor N, the frequency of the VCO output signal is then forced to be N times the
                 reference frequency (the frequency of the input signal u ). In most cases, the divider ratio
                                                                       1
                 N is made programmable. We will deal extensively with frequency synthesizers in Chaps.
                 6 and 7.
                   By inserting a down scaler, the term center frequency becomes ambiguous: the center
                 (radian) frequency ω  can be related to the output of the VCO (as done in Sec. 1.1), but it
                                     0
                 could also be related to the output of the down scaler, or in other words, to the input of
                 the PLL. To remove this dilemma, we introduce two different terms for center (radian)
                 frequency: we will use the symbol ω to denote the center frequency at the output of the
                                                     0
                 VCO, and the symbol ω ′ to denote the center radian frequency at the input of the PLL.
                                        0
                 Obviously, ω  and ω ′ are related by ω ′ = ω /N. As shown in Fig. 2.1, the quantities
                                                         0
                                                                 0
                                     0
                              0
                 related to the output signal of the down scaler are characterized by a prime (′symbol)—
                 for example, u ′, ω ′. When the VCO does not operate at its center frequency (u  ≠
                               2      2                                                             f
                 0), its output radian frequency is denoted as  ω . For the down-scaled frequency, the
                                                                 2
                 symbol ω ′ is used, as shown in Fig. 2.1. Again, we have ω ′ = ω /N.
                          2                                                 2       2
                   As will be demonstrated later in this chapter, the order (number of poles of the transfer
                 function) of a PLL is equal to the order of the loop filter +1. In most practical PLLs, first-
                 order loop filters are applied. These PLLs are therefore second-order systems. In a few
                 cases, the filter may be omitted (such a PLL is a first-order loop). In this chapter, we will
                 deal exclusively with first- and



                Printed from Digital Engineering Library @ McGraw-Hill (www.Digitalengineeringlibrary.com).
                Copyright ©2004 The McGraw-Hill Companies. All rights reserved.
                Any use is subject to the Terms of Use as given at the website.
   5   6   7   8   9   10   11   12   13   14   15