Page 169 - Phase-Locked Loops Design, Simulation, and Applications

PLL PERFORMANCE IN THE PRESENCE OF NOISE Ronald E. Best 104
We conclude that in cases where the reference signal can drop out, phase detector types 1 or
2 are the better choice. Moreover, the active PI loop filter (type 3) offers the best performance
relating to run-away of the VCO output frequency.

Pull-in Techniques for Noisy Signals

In this section, we summarize the most popular pull-in techniques. A special pull-in procedure
becomes mandatory if the noise bandwidth of a PLL system must be made so narrow the
signal may possibly not be captured at all.

The sweep technique
If this procedure is chosen, the noise bandwidth B is made so small that the SNR of the loop
L
(SNR) is sufficiently large to provide stable operation. As a consequence, the lock range Δω
L L
might become smaller than the frequency interval Δω within which the input signal is
expected to be. To solve the locking problem, the center frequency of the VCO is swept by
means of a sweeping signal u (Fig. 4.7) over the frequency range of interest. Of course,
sweep
the sweep rate must be held within the limits specified by Eq. (3.40); otherwise, the PLL could
not become locked. (In Sec. 3.4, we considered the case where the center frequency ω was
0
constant and the reference frequency ω was swept. In the case considered here, the reference
1
frequency is assumed to be constant, whereas the center frequency is swept. For the PLL, both
situations are equivalent, because the frequency offset Δω = ω − Δω ′ is the only parameter
1 0
of importance.)
As shown in the block diagram of Fig. 4.7, the center frequency of the VCO can be tuned
by the signal applied to its sweep input. A linear sawtooth signal generated by a simple RC
integrator is used as the sweep signal. Assume the PLL has not yet locked. The integrator is in
its RUN mode, and hence the sweep signal builds up in the positive direction. As soon as the
frequency of the VCO approaches the frequency of the input signal, the PLL suddenly locks.
The sweep signal should now be frozen at its present value (otherwise, the VCO frequency
would run away). This is realized by throwing the analog switch in Fig. 4.7 to the HOLD
position. To control the analog switch, we need a signal that tells us whether or not the PLL is
in the locked state. Such a control signal is generated by the in-lock detector shown in Fig. 4.7.
In this example, the in-lock detector is a cascade connection of a 90° phase shifter, an analog
multiplier, a low-pass filter, and a Schmitt trigger. If the PLL is locked, there is a phase offset
of approximately 90° between input signal u and VCO output signal u . (Note: it was
1 2
assumed here that the phase detector is either type 1 or 2. For other phase detectors, the phase
relationship would be different.) The phase shifter then outputs a signal u ′, which is nearly
1
in phase with the VCO output signal u . The average value of the output signal of the
2
multiplier u = u ′ · u is positive. If the PLL is not in the locked state, however, the
M
1
2
signals u ′ and u are uncorrelated, and the average value of u is zero. Thus, the output
1 2 M
signal of the multiplier is a clear indication of lock. To eliminate AC components and

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