Page 173 - Phase-Locked Loops Design, Simulation, and Applications

Source : Phase-Locked Loops: Design, Simulation, and Applications, Sixth
Edition Ronald E. Best 107

Design Procedure for Mixed-Signal PLLs

The mixed-signal PLL can be built in many variants, and the spectrum of applications is
very broad as well. There are PLL applications in communications where the system is
used to extract the clock from a—possibly noisy—information signal. In such an
application, noise suppression is of importance. An entirely different application of the
PLL is frequency synthesis. Here, reference noise is not of concern, but the synthesizer
should be able to switch rapidly from one frequency to another; hence, pull-in time is the
most relevant parameter.
For these reasons it appears difficult to give a design procedure that yields an optimum
solution for every PLL system. In this section, we present a PLL design procedure that is
based on a flowchart (see Fig. 5.1). To help compute the relevant entities in the PLL
design, the often-used formulas for the PLL key parameters have been listed in five tables
in chapter 3, Tables 3.1 through 3.5. Table 3.1 shows the equations for hold range, lock
range, and so on for a PLL using a type-1 phase detector. Table 3.2 presents the same
information, but for the EXOR phase detector, and so on.
The step-by-step design procedure of Fig. 5.1 should not be considered a universal tool
for the thousand-and-one uses of the PLL, but rather as a series of design hints.
Moreover, in many cases the design of a PLL will be an iterative process. We may start
with some initial assumptions but end up perhaps with a design that is not acceptable,
because one or more key parameters (for example, pull-in time) are outside the planned
range. In such a situation, we restart with altered premises and repeat the procedure until
the final design appears acceptable.
Manufacturers of PLL ICs have already provided design tools running on the PC. A
52
program distributed by Philips, for example, is used to design PLL systems using the
popular integrated circuits 74HC/HCT4046A, 74HC/HCT7046A, and 74HCT9046A. All
three are based on the old industry standard CD4046 IC (from the 4000 CMOS series),
which was originally introduced by RCA.

Printed from Digital Engineering Library @ McGraw-Hill (www.Digitalengineeringlibrary.com).
Copyright ©2004 The McGraw-Hill Companies. All rights reserved.
Any use is subject to the Terms of Use as given at the website.