Page 95 - Phase-Locked Loops Design, Simulation, and Applications

MIXED-SIGNAL PLL ANALYSIS Ronald E. Best 65
charge on capacitor remains unchanged—that is, the voltage on the capacitor stays constant.
(In practice, the capacitor would be discharged by leakage currents, of course.) This implies
that the passive lead-lag filter behaves like a real integrator when driven by a tri-state signal!
In other words, the passive lead-lag filter has infinite gain at f = 0 under this condition.
15
Volgers has shown that the transfer function of the passive lead-lag filter must be modified
when it is driven by the PFD. It shows up that the transfer function is approximately given by

(3.56)

When the active lead-lag filter is used, the transfer function is approximated by

(3.57)

where K = C /C (cf. Fig. 2.19a). When the active PI filter is chosen, however, it does not
a 1 2
matter whether the filter is driven by a “normal” signal source or by a device having a tri-
state output. In any case, the PI filter acts as an integrator whose transfer function is given by

(3.58)

Consequently, the DC gain F(0) for all three filter types is infinite when driven by a tri-state
source. Hence, the hold range for phase detector 4a becomes

(3.59)

Note: Inversion of polarity is discarded in Eqs. (3.57) and (3.58).
Phase detector type 4b. For the PFD with current output, no output current flows when
both current sources are off (cf. Fig. 2.17). Therefore, the PFD with current output behaves
like a PFD with tri-state output as discussed earlier. Also, here the hold range becomes infinite

(3.60)

Lock range Δω and lock time T L
L
As in the previous section, here we analyze the lock range and the lock time separately for
each type of phase detector.

Phase detector type 1. The magnitude of the lock range can be obtained by a simple
consideration. We assume that the PLL initially is not locked and that the reference frequency
is ω = ω ′ + Δω. The reference signal of the PLL is then given by
1 0