Page 268 - Semiconductor Manufacturing Handbook

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WET CLEANING

WET CLEANING 18.9

Other modifications involve the dilution of RCA chemistries that result in lower costs by a com-
bination of reduced chemical consumption, decreased effluent treatment, and less environmental
impact. Dilute RCA chemistries have been tested at numerous concentrations including a ratio of
15
1:20:100 (NH OH/H O /H O) for SC1 with comparable particle removal capabilities. This mix-
4 2 2 2
ture is optimal because experimental studies have shown that the high pH (less than 9) is required
16
for particle removal as well as minimizing the silicon etch rate. A diluted SC1 chemistry with a ratio
of 1:1:20 can also be used. This is done to reduce the hydrogen peroxide concentration that is con-
sidered a potential source of metallic contamination because of its propensity to deposit metals on a
wafer surface in high alkali solutions. It maintains the thermal stability of the standard solution and
therefore maintains a similar bath life. A modified and dilute version SC2 can also be used. This ver-
sion is a mixture of HF/HCl/H O in a ratio of 1:1:200. This solution is quite effective in removing
2
metallics and eliminates the need for an HF last step. Typically this modified and dilute SC2 treatment
is followed by a step of H O/O to provide a passivated oxide surface to inhibit particle attraction. 17
2 3
∗
A modified approach to the “full” RCA clean (SPM -> HF -> SC1 -> SC2) is the IMEC clean. 2
This replaces SPM with a mixture of H SO , O , and H O. This mixture has a longer bathlife than
2 4 3 2
SPM. The three remaining chemical steps are replaced with a single chemical step of HF/HCl/H O
2
followed by an ozonated water (H O/O ) step.
2 3
Post-Dry Etch or Ash Residue Removal. FEOL post-dry etch ash residue removal is accomplished
using standard cleaning techniques. This process step comes after the bulk of the photoresist has
been removed by exposure to a plasma etch. There are two types of photoresist—positive and nega-
tive. A positive photoresist is most widely used today and is easy to remove using chemicals such as
SPM and/or APM. A negative photoresist is seldom used in current semiconductor manufacturing
given its inherent difficulty to remove.
Metal Removal. Wet cleaning is also traditionally required after metal silicide barrier formation
due to the presence of unreacted metal. In the case of cobalt or nickel silicide, the unreacted cobalt
(or nickel) and titanium nitride (TiN) must be selectively removed from the silicide surface. These
materials are typically removed with a mixture of H SO and H O (SPM) in a ratio of 6:1. This is
2 4 2 2
followed by a rinse and then by APM and then a final rinse. The complete removal of these materi-
als is critical in order to reduce yield loss due to open contacts from Ti or Co contamination. 18
Post-CMP Clean. FEOL post-chemical mechanical planarization (CMP) cleaning is a very chal-
lenging cleaning process that needs to be independent of the polish used in CMP and does not react
with the materials on the wafer. Two common ways to perform post-CMP cleaning of thermal oxide
wafers are using a scrubbing system or a megasonic system. The scrubbing system typically uses DI
water to clean the wafer but brushes have been found in some cases to induce defects on the wafer.
A megasonic system using SC1 produces the same cleaning efficiency as the scrubbing system with-
out the induced defects. From a cleaning standpoint, the megasonic system is superior to the scrub-
bing system. However, concerns with damaging sensitive device structures make the use of
megasonics challenging. Although the scrubbing system does induce defects, it does not use any
chemicals. If the induced defects can be tolerated, that is, if they do not have a significant effect on
yield, the scrubbing system is also a viable solution. 19
Backside Cleans. After certain steps in FEOL processing it is necessary to remove contamination
from the backside of the wafer. The contamination typically comes in two forms. The first involves
the presence of ionic contamination that can be considered as potential killer defects. The second
involves concerns over “litho hot spots” (addressed later in the chapter). In cases where there is a
possibility of transference of these defects to the front side wafer surface, it is necessary to clean the
wafer backside. This is typically completed with an HF-based chemistry to remove newer materials
such as high-k dielectrics (e.g., HfO , ZrO , and Ta O ).
2 2 2 5
*
IMEC (Interuniversity MicroElectronics Center) is Europe’s leading independent research center in the field of microelec-
tronics, nanotechnology, enabling design methods, and technologies for ICT systems.

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