Page 426 - A Comprehensive Guide to Solar Energy Systems

436 A COmPREhEnSIVE GuIdE TO SOLAR EnERGy SySTEmS

Aside from the kerf loss the mWSS process has other drawbacks: wafer contamina-
tion, thickness variation across the wafer, high breakage, and high material consump-
tion. To address those drawbacks alternative wafering methods were proposed, most
notably a wire sawing process using a diamond abrasive on the wire. most machines
on the market today are adaptable for diamond wires, and implementing them will in-
crease the throughput by a factor of 2–3. In addition, the kerf is commercially recyclable
as opposed to kerf from the slurry-based process, and wire consumption per wafer is
much lower [9].

22.5.3 Cell Processing
According to the International Technology Roadmap for Photovoltaics (ITRPV) roadmap
as wafers get thinner, so large fraction of cells become rear-contact cells because front-
to-rear interconnections and soldering of interconnects induces too much stress on thin
wafers. There are three main approaches to rear-contact cells [11]: metal wrap-through
(mWT), emitter wrap-through (EWT), and back-junction (BJ). In the first two approaches
the emitter is still at the front of the device, but holes are laser drilled through the wafer
that transport carriers to the rear, either through the metal contacts (mWT) or the emitter
(EWT). The main difference between mWT and EWT is thus that the mWT still has grid
lines (but no busbars) on the front surface. In a BJ cell, the emitter is located at the rear
surface, typically in an interdigitated fashion with the back surface field (BSF). A BJ cell has
the benefit that the contacts can cover almost the whole rear side of the cell, greatly reduc-
ing series resistance. All three approaches reduce contact shading, although this is espe-
cially true for the EWT and BJ types. Large-area efficiencies of 24.2% have been reached on
BJ solar cells, and over 20% for mWT and EWT cells. Efficiencies of 20.2% are reported for
interdigitated back contact silicon heterojunction cells (IBC-hIT) but simulations show
that efficiencies of up to 26% are possible [9].

22.5.4 Technological Scenarios
Based on the developments described in the previous subsections mann, de Wild-
Scholten, Fthenakis et al. [9] have defined three advanced modules, and described
their potential for environmental impact improvements (Table 22.1). module 1 is a
high efficiency scenario based on 120 µm thick mWSS wafers, and an IBC-hIT design
with dielectric stack passivation, random pyramidal texture on the front surface and
plated copper contacts. Based on the technology road mapping cell approach, module
efficiencies are assumed to be 23.5%.
module 2 is a slight modification of 1: Wafering is now done through light ion implan-
tation, as in Silicon Genesis’ Polymax process. Wafers from this process are stronger me-
chanically, which is why a higher yield (98% vs. 90%) can be assumed [9].
module 3 is a low-cost alternative based on umG-Si feedstock and quasi-monocrys-
talline wafers. The efficiency for this cell is 20%, based on promising umG-Si and mWT
results and ITRPV projections [8,9].