Page 214 - Bebop to The Boolean Boogie An Unconventional Guide to Electronics Fundamentals, Components, and Processes

Programmable ICs w 195

based on SRAM cells are volatile and lose their data when power is removed
from the system. However, these devices can be dynamically reprogrammed
while the circuit is in use. Some SRAM-based devices employ a double-buffering
scheme using two SRAM cells per link. In this case, the device can be
reprogrammed with a new pattern while it is still operating with an old pattern.
At the appropriate time, the device can be instructed to switch from one bank
of SRAM cells to the other.
Reprogrammable devices also convey advantages over fusible link and
antifuse devices in that they can be more rigorously tested at the factory. For
example, reprogrammable devices typically undergo one or more program and
erase cycles before being shipped to the end user.

Complex PLDs (CPLDs)

The term complex PLD (CPLD) is generally taken to refer to a class of
devices that contain a number of simple PLA or PAL functions-generically
referred to as simple PLDs (SPLDs) -sharing a common programmable inter-
connection matrix (Figure 16-22).

Figure 16-22. Generic CPLD structure

In addition to programming the individual PLD blocks, the connections
between the blocks can be configured by means of the pogrummable intercon-
nection matrix. Additional flexibility may be provided with a CPLD whose links
are based on SRAM cells. In this case, it may be possible to configure each PLD
block to either act in its traditional role or to function as a block of SRAM.