Page 141 - DSP Integrated Circuits

126 Chapter 4 Digital Filters

The cost of realizing the complementary filter seems to be only one subtracter.
However, the requirement on the normal FIR filter must usually be increased sig-
nificantly in order to meet the requirements on the complementary filter. Hence,
the arithmetic work load is somewhat larger than that for one single FIR filter, but
is still significantly smaller than that for two separate filters.
This technique can, of course, be applied to linear-phase FIR filter structures
with either symmetric or antisymmetric impulse responses and their transposes.
Complementary half-band FIR filters are particularly useful, since the saving in
arithmetic work load is substantial. Complementary FIR filters of odd order (N =
even) are not feasible, since the value corresponding to Tg(crfT) = (N - l)T/2 is not
available.

4.3.5 Miscellaneous FIR Structures
Long FIR filters can be implemented efficiently using the fast Fourier transform
(FFT). There are two main approaches: overlap-add and overlap-save [15-18].
These approaches are efficient if the length of the FIR filter is larger than 60 to 100.
FIR filters that are imbedded in adaptive FIR filters are often realized by a lat-
tice structure [1, 17]. A drawback is that the number of arithmetic operations is
high since there are two multiplications and two additions for each filter coefficient.
High-order IIR filters are often realized as a cascade of several low-order ni-
ters in order to reduce the sensitivity to coefficient errors. This approach can in
principle also be used for FIR filters, but the benefits are offset by a decrease in
dynamic signal range. Traditionally, most textbooks [15-18, 27] contain a discus-
sion of so-called frequency-sampling FIR structures. These filter structures are
recursive algorithms that rely on pole-zero canceling techniques. Although they
may at first seem to be interesting, they should not be used due to their high coef-
ficient sensitivity, low dynamic range, and severe stability problems.

4.4 FIR CHIPS

Table 4.1 lists some commercial FIR chips and their characteristics. The devices
from Inmos and Harris are aimed at high-speed applications—for example, filter-
ing of video and radar signals. Generally, the devices can be cascaded to obtain
longer filter lengths and/or to obtain higher accuracy. For example, the A100 from
Inmos has both an asynchronous parallel host interface and a high-speed synchro-
nous interface allowing several circuits to be cascaded for high-performance appli-
cations. The circuit has two sets of coefficients that are accessible via the host
interface.
The Motorola 56200 is aimed at applications using low to medium sample
rates. A typical application is filtering of audio signals. Another important area
where the circuits can be used is in communications systems. The Motorola
DSP56200 can implement either a single FIR (SFIR) filter with up to 256 taps or
dual FIR (DFIR) filter with up to 128 taps. It can also implement the adaptive
LMS algorithm discussed in Chapter 3. In the adaptive FIR mode the circuit
cycles through memory twice per sample—first to perform the FIR convolution,
and second to update the FIR coefficients using the LMS algorithm.