Page 18 - DSP Integrated Circuits
P. 18
1.3 Standard Digital Signal Processors 3
mainly coding the DSP algorithm either using a high-level language (for exam-
ple, the C language) or directly in assembly language. Some high-level design
tools allow the user to describe the algorithm as a block diagram via a graphic
user interface. The tool automatically combines optimized source codes for the
blocks, which are stored in a library, with code that calls the blocks according to
the block diagram. Finally, the source code is compiled into object code that can
be executed by the processor. This approach allows rapid prototyping, and the
achieved performance in terms of execution speed and code size is reasonably
good since the codes for the blocks are optimized. However, the performance may
become poor if the blocks are too simple since the code interfacing the blocks is
relatively inefficient.
Generally, the implementation process,
which is illustrated in Figure 1.1, begins with
the derivation of an executable high-level
description that is subsequently transformed in
one or several steps into object code. The repre-
sentations (languages) used for these transfor-
mations are general and flexible so that they
can be used for a large set of problems. Further,
they are highly standardized.
The key idea, from the hardware designer's
point of view, is that the hardware structure
(digital signal processor) can be standardized by
using a low-level language (instruction set) as
interface between the DSP algorithm and the
hardware. The digital signal processor can
thereby be used for a wide range of applications.
This approach puts an emphasis on short
design times and low cost due to the wide appli-
cability of the hardware. Unfortunately, it is not
always cost-effective, and often the performance
requirements in terms of throughput, power
consumption, size, etc. cannot be met. The main Figure 1.1 Overview of the
reason is mismatch between the capabilities of implementation
a standard digital signal processor and the sig- process using
nal processing requirements. The standard pro- standard signal
processors
cessor is designed to be flexible in order to
accommodate a wide range of DSP algorithms
while most algorithms use only a small traction 01 tne instructions provided, ine
flexibility provided by a user-programmable chip is not needed in many applica-
tions. Besides, this flexibility does not come without cost.
It should be stressed that if a standard digital signal processor approach can
meet the requirements, it is often the best approach. It allows the system to be
modified by reprogramming in order to remove errors, and it provides the option of
introducing new features that may extend the lifetime of the product. A new design
always involves a significant risk that the system will not work properly or that it
takes too long to develop and manufacture, so that the market window is lost. A
standard digital signal processor approach is therefore an economically attractive
approach for some types of DSP applications.