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11.14 Distributed Arithmetic                                         505


        time is W^ clock cycles. The word length in the ROM, WRQM> depends on the F^
        with the largest magnitude and the coefficient word length,^, and





        EXAMPLE 11.11

        Determine the values that should be stored in ROM for the inner product
                                 y = ai xi + a 2 x 2 + a 3 #3

        where ai = 33/128 = (0.0100001)20, «2 = 85/128 = (0.1010101) 2 c, and a 3 = -11/128 =
                       so
        (1.1110101)2C- Al  determine the necessary word length in the shift-accumulator.
            We shall precompute all possible linear combinations of coefficients according
        to Equation (11.48). These values shall then be stored in ROM at the addresses
        given by the binary weights in the linear combination. Table 11.3 shows the values
        both in binary and decimal form with the corresponding addresses.


                   *1*2 *3         Fk             ?k            F_k
                   00 0             0          0.0000000     0.0000000
                   00 1            03          1.1110101      0.0859375
                   01 0            02          0.1010101     0.6640625
                   01 1           02 + 03      0.1001010      0.5781250
                    10 0           01          0.0100001      0.2578125
                   10 1           01 + 03      0.0010110     0.1718750
                   11 0           oi + a 2     0.1110110      0.9218750
                   11 1         ai + 02 + 03   0.1101011      0.8359375
                                  Table 11.3 ROM contents

            The shift-accumulator must be able to add correctly the largest possible value
        obtained in the accumulator register and in the ROM. The largest value in the
        accumulator register is obtained when the largest (magnitude) value stored in the
        ROM is repeatedly accumulated. Thus, at the last clock cycle, corresponding to the
        sign bit, the value in REG according to Equation (11.49) is



            Hence, the shift-accumulator must be able to add two numbers of magnitude
        - Fmax- The necessary number range is ± 1. The word length in the shift-accumula-
        tor must be 1 guard bit for overflow detection + 1 sign bit + 0 integer bits + 7 frac-
        tional bits = 9 bits.




            Notice the similarity between Equations (11.22) and (11.47). In Equation
        (11.22), the partial products are summed while in Equation (11.47) the values of
        Ffc are summed. In both cases, the same type of shift-accumulator can be used.
        Hence, the distributed arithmetic unit essentially consists of a serial/parallell
        multiplier augmented by a ROM.
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