Page 574 - DSP Integrated Circuits
P. 574

Index                                                                559


        Minuend 473                          Parallel connection 148
        MISD 371                             Parallel form 358, 411
        Mobility of charges 36               Parallel multiplier 475
        Model 0 232                          Parameter variation 46
        Model 1 232                          Parasitic oscillation 61,187
        Modular 20                           Parasitic oscillations 187,191
        Moore form 439                       Parity 336
        Most-significant bit (MSB) 462        Pass-transistors 447
        Motorola 56200 127                   Passband sensitivity 158
        Motorola DSP56001 363                PE (Processing element) 371
        MSB (Most Significant Bit) 462       PE assignment 336
        MSDCT 102, 533                       Periodic formulation 293
        Miiller C element 452                Periodic input 193
        Multicomputers 370                   Periodic scheduling formulation 298
        Multiprocessors 370                  Permittivity 35
        Multirate filter 177                 Phase function 76
        Murphy-Moore's model 552             Phase response 74,135
                                             Physical view 9
        N                                    Pipeline interleaving 260
        n-channel 31                         Pipelining 255,295
        n-channel depletion mode transistor 38  PLA (Programmable Logic Array) 439
        n-channel enhancement mode transistor 38  Placement problem 533
        n-dimensional structural pipeline 375-376  Poisson model 552
        n-well 48                            Poisson's summation formula 66
        NAND gate 38                         Poles 79
        Narrow-band input signal 203         Port map 22
        Narrow-band signal 206               Port resistance 140
        Nested form 412                      POS 439
        Netlist 537, 539                     Positional number system 471
        Next 395                             Power consumption 388
        nMOS inverter 38                     Power dissipation 44
        nMOS logic 37                        Precedence graph 229
        Noise gain 209                       Precedent 229
        Non-heuristic methods 313            Precharge phase 46
        Non-observable oscillation 193       Precharge-evaluation logic 45
        Non-overlapped two-phase clock 447   Preemptive process 292
        Non-overlapping clock 447            Probability of overflow 198
        Non-preemptive 292                   Process spread 46
        Non-preemptive process 292           Processing elements 6, 60, 366
        Non-sequentially computable 234      Processor array 371
        Number of words in the ROM 506       Processor bound 298
        Numerically equivalent algorithm 399  Processor optimal 298
        Numerically equivalent form 402      Products-of-Sums 439
        Nyquist Sampling Theorem 66          Programmable Logic Array 439
                                             Propagation delay, 40
        O                                    Pseudo-power 195
        ODCT 101                             Pull-up device 38
        Odd Discrete Cosine Transform 102
        Omega network 372                    Q
        On-line arithmetic 470               Q 208
        One's-complement representation 463  Quantization 2197,208, 212, 486
        One-port network 140                 Quantization step 208
        Onionskin view 9                     Q c 208
        Open-circuit 146
        Optimization 18                      R
        Overflow 187,188,198, 486            Radix complement representation 465
        Overflow correction 487              Radix-2 FFT 88
        Overflow oscillation 191             Rate optimal 292
        Overlap-add 126                      Ratioed logic 38
        Overlap-save 126                     Ratioless logic 40
                                             Recursive algorithm 73
        P                                    Recursive Least Square filters (RLS) 85
        p-channel 31                         Reduced computational complexity 162
        Packet switching 374                 Reduced Instruction-Set Computers 359
        Parallel algorithm 229               Reducing the memory size 510
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