Page 71 - DSP Integrated Circuits
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56 Chapter 2 VLSI Circuit Technologies
acceptable chip area used for the PEs may be increased. Show that the power
consumption can be reduced by lowering the supply voltage and using two
PEs in parallel.
2.8 Identify the logic style and determine the logic function that is realized by
the circuit shown in Figure P2.8.
Figure P2.8
2.9 Identify the logic style and determine the logic function that is realized by
the circuit shown in Figure P2.9.
Figure P2.9
