Page 287 - Embedded Microprocessor Systems Real World Design

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OPTICAL SENSORS
ELECTROMECHANICAL SENSORS LPTPORT D ETMRNET
DATA PACKET NT
OUTPUTS a-
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Figure 10.3
Real-Time Embedded PC.

manner. As processor speeds have increased, the use of PGbased control systems
becomes more feasible. However, the primary drawback to such systems is still the
lack of repeatable, predictable timing.
Figure 10.3 shows an embedded system based on the PC architecture. This
particular system is part of a document imaging application. Documents are imaged
at a rate of about 24 per second. The microcontroller board interfaces to the trans-
port electronics. It services a regular interrupt every 266 microseconds. In addi-
tion, the microcontroller processes optical and electromechanical interrupts that
indicate document position and the state of the transport. A data packet from the
transport electronics provides information about each document to be imaged.
Outputs from the microcontroller include control signals to the lamps and other
transport subsystems.
The PC has an interface to the imaging cameras using custom interface boards
that plug into the PCI bus in the PC. The PC merges the data stream information
with the document images and sends the resulting data to a host system.
The PC has sufficient memory and processing capability to buffer and process
the images while managing the Ethernet connection to the host. The PC is not
capable of handling the 266-microsecond timing requirements of the lower-level
hardware, so the microcontroller handles that aspect of the system.
The microcontroller board contains a FIFO that provides an interface to the PC.
Data passed to the PC include the document data packet, machine status, and
timing information used to synchronize everything. Using this architecture, the PC
only has to service the FIFO every couple of documents, about once every 100ms.
The FIFO keeps the data packets and other information in the right order.
The PC does not need to know the specific timing of each event in the FIFO,
although knowing the sequence of events is important. If timing information had
been needed, the interface protocol could have been modified to accommodate it.
For example, each data item in the FIFO could be accompanied by the contents of
a 16-bit free running counter, or the amount of time between data items could be
included.

268 Embedded Micropocessm Systems