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is required with only 256 bytes of on-chip RAM. The microchip debug capability is
                   enabled by programming a bit when the microcontroller EPROM is programmed.
                     Many microprocessors implement a joint test action group (JTAG) interface for
                   debugging. ThepAG interface is a standardized serial interface that permits auto-
                   matic test equipment to serially read and write the contents of internal registers in
                   the IC. TheJTAG interface standard (IEEE 1149) is flexible enough that it also can
                   support on-chip debugging capabilities.
                     The AMD SC520 uses theJTAG interface to provide debug support. An internal
                   memory  stores  trace  information  about  program  execution.  Of  course, with  a
                   serial interface, there is no way to track every instruction in real time, so the trace
                   information is partial. The software in the host PC must do some of the work of
                   decoding the debug information from the chip.



                                                  ~
                   Memory Management Hardware


                   Many advanced microprocessors include hardware for memory management. The
                   features provided by memory management include the following.

                   Memory Protection
                   As mentioned in Chapter 4,  there is nothing to prevent a berserk program from
                   writing all through memory. In a system with a memory management unit (MMU),
                   each program is limited to its own  area of  memory and cannot corrupt memory
                   allocated to other programs.


                   Write Protection
                   Using an MMU, certain areas of memory can be set aside as read-only, even though
                   they are physically implemented as RAM. The MMU detects any attempts to write
                   to those memory areas.


                   Relocation
                   A  program  may  be  written  with  absolute  branch  addresses  and  it  may  access
                   absolute  memory  locations.  Such  programs  cannot  be  relocated  because  the
                   addresses would  all be  wrong.  The  MMU  can  translate  the  addresses, allowing
                   the programs to be executed Erom any location in memory.

                   Supervisor
                   Processors that have an MMU also have multiple privilege levels. Supervisor is one
                   of  these. Among other  things, the  supervisor level allows the  MMU  to  be  pro-


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