Page 347 - Embedded Microprocessor Systems Real World Design

Figure D.4
Addition of a Control Store.

You can think of addressable memory as being like a row of apartments. Somebody named
Tom lives in apartment number 1. Frank lives in apartment number 2, and Zoe lives in apart-
ment number 3. If you stand at the end of the hall and shout for whoever lives in apartment
1 to come out, Tom will step into the hall. If you shout for the person in apartment 3 to
come out, you will see Zoe.
Now suppose that the people in the apartments have numbers instead of names. Tom is
117, Frank is 145, and Zoe is 4567. Now if you shout for the person in apartment 1 to come
out, number 117 will appear. Note that our hypothetical apartment complex can have only
one person living in each apartment.
The apartment number in this simple example is equivalent to the address that is input
to an addressable memory. Each location (apartment) in the memory has a number (person)
stored there. When the address of a location is applied to the input of the memory, the
number stored in that location appears at the output.
The numbers in the memory need not be unique. Just as you can have two Toms living
in the same apartment complex, you can have multiple instances of the same number in
different locations of an addressable memory.
One difference between apartment numbers and memory locations is zero-based
addressing. Apartment and house numbers do not start with zero (although they could), but
memory locations do. Remember that the input to an addressable memory is a binary
number, and all zeros is as good a binary number as any other. In a microprocessor system,
all the addresses are used, including zero.
The address and output need not be the same number of bits. For example, an address
able memory may have a 10-bit address (1024 locations) and an &bit output (256 possible
values). Real addressable memories have other inputs in addition to the address. We’ll look
at those later. The concept of addressable memory is key to understanding how micro-
processors work.

Timing Logic
The timing logic will not be examined in detail. It just makes sure that things happen at the
right time, such as waiting until the ALU outputs are stable before clocking them into one
of the registers.

328 Appendix D