Page 444 - Engineering Digital Design

414 CHAPTER 9 / PROPAGATION DELAY AND TIMING DEFECTS

known published information on static hazards in circuits of the XOR type considered in
this chapter.

[1] M. A. Breuer and A. D. Friedman, Diagnosis and Reliable Design of Digital Systems. Computer
Science Press, 1976, pp. 10-13.
[2] R. H. Katz, Contemporary Logic Design. Benjamin/Cummings Publishing Co., Redwood City,
CA, 1992.
[3] E. J. McCluskey, Logic Design Principles. Prentice-Hall, Englewood Cliffs, NJ, 1986.
[4] R. F. Tinder, Digital Engineering Design: A Modern Approach. Prentice-Hall, Englewood Cliffs,
NJ, 1991.
[5] J. F. Wakerly, Digital Design Principles and Practice. Prentice-Hall, Englewood Cliffs, NJ,
1986.
[6] J. M. Yarbrough, Digital Logic. West Publishing Co., Minneapolis/St. Paul, 1997.

A discussion of the construction and application of binary decision diagrams (BDDs)
is limited to a few texts, among which are those of De Micheli and Sasao (Ed.). However,
more extensive information is available from published journal articles. Typical of these are
articles by Akers and Bryant.

[7] S. Akers, "Binary Decision Diagrams," IEEE Trans, on Computers, C-27, 509-516 (1978).
[8] R. Bryant, "Graph-based Algorithms for Boolean Function Manipulation, " IEEE Trans, on
Computers C-35(8), 677-691 (1986).
[9] G. De Micheli, Synthesis and Optimization of Digital Circuits. McGraw-Hill, New York, 1994.
[10] T. Sasao (Ed.), Logic Synthesis and Optimization. Kluwer Academic Publishers, Boston, 1993.

The subjects of fault detection and fault models are well covered by a number of texts
and articles. For the beginning reader the text of Hayes does a commendable job. The text
by McCluskey (previously cited) and that by Nelson, Nagle, Carroll, and Irwin are also
recommended. For the advanced reader the texts by De Mecheli (previously cited) and Lala
can be useful.

[11] J. P. Hayes, Introduction to Digital Design. Addison-Wesley, Reading, MA, 1993.
[12] P. K. Lala, Fault Tolerant and Fault Testable Hardware Design. Prentice-Hall, Englewood Cliffs,
NJ, 1985.
[13] V. P Nelson, H. T. Nagle, B. D. Carroll, and J. D. Irwin, Digital Logic Circuit Analysis and
Design. Prentice-Hall, Englewood Cliffs, NJ, 1995.

The following articles are noteworthy for their coverage of fault detection and testing,
and of fault-tolerant systems:

[14] A. Chatterjee and M. A. d'Abreu, "The Design of Fault-Tolerant Linear Digital State Variable
Systems: Theory and Techniques," IEEE Trans, on Computers 42(7), 794-808 (1993).
[15] T. Lin and K. G. Shin, "An Optimal Retry Policy Based on Fault Classification," IEEE Trans,
on Computers 43(9), 1014-1025 (1994).
[16] B. Vinnakota and N. K. Jha, "Diagnosability and Diagnosis of Algorithm-Based Fault-Tolerant
Systems," IEEE Trans, on Computers 42(8), 924-937 (1993).