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Multilevel inverters: an enabling technology 69

3 Matlab/Simulink modeling and simulation of multilevel
inverters

The purpose of the drive system is to imply highly efficient power conversion, validate
the simplicity and flexibility in the control strategy, and credibility for wide range of
operation. Some advantages of the motor drive systems in implementing the cascade
inverter are repentant switching operation to balance battery usage, worst case work-
ing capability, which maintains operation at reduced performance. The separate DC
sources can be turned on by using various ways to incorporate the output voltage, thus
intensifying the drive system operability and system management extensibility. The
cascaded H-bridge has drawn remarkable interest since the mid-1990s, and the most
common applications are for ASD (adjustable speed drives) [9] and reactive power
compensation [10]. The modular structure imparts advantages as easily expandable
for higher number of output voltage levels and fault tolerance can be attained by
bypassing the fault modules.
MATLAB is considered as a high performance language used for technical com-
puting. It consolidates computation, visualization, and programming in a better way
to use environment where problems and solutions are anticipated in familiar math-
ematical notation. MATLAB is a correlative system whose primitive data element is
an array that does not necessitate dimensioning. This permits to solve many techni-
cal problems, especially those with matrix and vector formulations in micro seconds.
Matlab/Simulink Modelling and Simulation of Single Phase Three Level CMLI (Cas-
caded Multilevel Inverter) has been discussed in the below sections.

3.1 Single phase three level CMLI
To procure the three level cascaded inverter configuration the two H bridges are con-
nected in series as illustrated in Fig. 4.6. The output of the first H bridge is in series
with the second bridge. The switching pulses for the power switches in the H bridge
is given by the four pulse generation units from P0 to P2. For the second H bridge the
pulse generation units P5 to P7 give the switching pulses. The respective pulse genera-
tion units will have its own subsystems interlinked with other pulse generation units
to avoid the short circuit problems between the switches present in the same leg. For
the positive half cycle of the stepped output AC voltage the power switches M0, M3,
M4, and M7 are turned ON with the suitable firing pulses. For the negative half cycle
of the output AC the switches M1, M2, M5, and M6 are turned on with suitable firing
pulses. The power circuit and pulse circuits are demonstrated in Fig. 4.6.

4 Applications of multilevel inverters

As mentioned in earlier sections, multilevel inverters have significance in high-
power medium voltage and power quality applications, where the power range and
power quality constraints of classic topologies validate their use. In this section, some