Page 355 - Introduction to Information Optics

340 6. Interconnection with Optics

interconnection lengths (>15 cm) [31-35]. A fanout chip is required to
provide massive electrical fanout. The synchronous global clock signal dis-
tribution is highly desirable to simplify the architecture and enable higher-
speed performance. High-speed, large-area massive fanout optoelectronic inter-
connects may overcome many of the problems associated with electrical
interconnects in this interconnection scenario [31-38]. An array of novel
optical interconnect architecture has been proposed and then demonstrated by
earlier researchers [38, 39,40], which may partially satisfy the above require-
ments for a massive clock signal distribution in intraboard and interboard
hierarchies.
This section describes a guided-wave optoelectronic interconnect network
for optical clock signal distribution for a board-level multiprocessor system.
For comparison, the electrical interconnect network of the clock signal
distribution for a Cray T-90 supercomputer at the board level currently
employed and the corresponding implementation of optical interconnection are
shown in Fig. 6.39(a) and 6.39(b), respectively. Figure 6.39(a) shows the
existing 500 MHz l-to-48 clock signal distribution (one side) realized in one of
the 52 vertically integrated layers within the Cray T-90 supercomputer board.
To further upgrade the clock speed, an appropriate optical interconnect
scheme, shown in Fig. 6.39(b) has to be incorporated to minimize electrical
interconnection-induced unwanted effects. An integrated board-level optoelec-

Electrical Fanout Network

(a ) (b )

Fig. 6.39. Schematic diagrams of massive clock signal distribution networks using (a) an optical
waveguide H-lree and (b) an electrical transmission line network.