Page 350 - Introduction to Information Optics

6.5. Integration of Vertical Cavity Surface-Emitting Lasers (VCSELs) 335

low threshold current with much less temperature sensitivity, moderate optical
power (few mW), very high direct modulation bandwidth (>14 GHz), wide
operating temperature range ( — 55 to 4-125 C), and ease of packaging in an
array configuration due to their unique surface-normal output nature. To
provide a high coupling efficiency using the proposed waveguide couplers, the
control of the emitting aperture and of the wavelength are pivotal and make
VCSELs the best choice due to the large separation of the adjacent longitudi-
nal modes implied by the short cavity length. To provide the required fanouts
9
with a bit-error rate of 10" at the required speed, a VCSEL with enough
modulated power is needed to accommodate all losses including the —3 dB
power margin. Planar configuration of VCSELs allows these devices to be
fabricated and wafer-scale tested with conventional microelectronics manufac-
turing processes. The unique surface-normal emitting nature of the device
allows us to use exactly the same packaging scheme for coupling light from a
VCSEL into a waveguide as that used for coupling light from a waveguide into
a photodetector.
The important aspects of the VCSEL for fully embedded board-level optical
interconnects applications are its very thin laser cavity, typically less than
1.0 /im, and its surface-normal emitting characteristic. Table 6.3 gives a Epi-
layer structure of a 3 QW (quantum-well) VCSEL. If the substrate of the
VCSEL is removed, a very thin VCSEL enables the formation of a fully
embedded optical interconnection, as depicted in Fig. 6.1. However, VCSELs
in this embedded scheme are surrounded with a thermal insulator such as
polymer; therefore, generated heat builds up within the embedded layer. This
necessitates consideration of efficient heat-removal methods. Intrinsically, heat
generated in a thin VCSEL will be more rapidly transported to the surfaces of
the VCSEL than in the case of a thick VCSEL. A forced heat-removal method
using via and thermoelectric cooler (TEC) can be the best choice for effective
cooling. Via, which feed electrical current to the VCSEL, can be used
simultaneously as a heat conduction path.
For a parallel channel interconnection, an 850-nm linear VCSEL array with
12 independently addressable lasers with 250-/«n separation will be employed.
To incorporate the VCSEL array in the fully embedded architecture, the
VCSEL array has to be thin enough to build such a 3-D structure. There are
two methods to make thin-film VCSELs; chemical mechanical polishing and
epitaxial liftoff [28, 29, 30]. A mechanically polished thin VCSEL array is
shown in Fig. 6.35(a) and (b). Figure 6.35(a) shows a section of the 12-channel
VCSELs array, and Fig. 6.35(b) shows the SEM picture of the mechanically
polished thin VCSEL array where the thickness of the GaAs is measured to be
42/tm. An ?i-ohmic contact was fabricated on the polished side using
Cr(40 nm)/Au(200 nm) and annealed at 350 C for 20 sec.
Substrate removal using epitaxial liftoff is based on extremely selective
9
etching (> 10 ) of AlAs in dilute hydrofluoric acid. The epitaxial liftoff process