Page 524 - Introduction to Information Optics

9.4. Parallel Signed-Digit Arithmetic 509

Table 9.11
Truth Table for the Second Step
MSD Addition/Subtraction [134]

t,
0 0 (1) 0
0 1 (1) 1
1 0
0 1 (0) I
T 0
\_ T (0) 0
T i

each position in parallel to yield the final sum S or the difference D of the two
operands without carries. The truth table is shown in Table 9.11. The logic
functions for the final sum 5 and D can be obtained by defining a binary
reference bit g\ which is true for positive f, and w t:

for s, and d t,

output'T'r^ew.Vi, (9.31)
output "T": (t, 0 w,-)^. (9.32)

The logic operations required for the 1 and 1 outputs of S are the same as those
for the 1 and 1 outputs of W in the first step, respectively.
Therefore, both addition and subtraction can be performed in parallel by
the same binary logic operations. This offers the advantage that through data
programming we can perform space-variant arithmetic computation by space-
invariant logic operations. The data flow diagram of the scheme is shown in
Fig. 9.18. Additionally, in comparison with the approach [135] (to be described
below) in which the MSD arithmetic was performed with binary logic via
separating the positive and negative digits, the adoption of the reference bits
yields simpler logical expressions, thus reducing the system complexity.
For example, consider the following illustrations for addition and subtrac-
tion using the proposed algorithm:

Addition: Al + Bl Subtraction: A2 - B2

Al: lOTIllTT (89, 0) A2: TOllITlG (-90 10)
Bl: llT01lTO(170 10 ) B2: lOTOllll (111, 0 )