Page 62 - System on Package_ Miniaturization of the Entire System

CHAPTER 2

Introduction to

System-on-Chip (SOC)

Mahesh Mehendale and Jagdish Rao
Texas Instruments

2.1 Introduction 40 2.4 SOC Design Challenge 50
2.2 Key Customer Requirements 42 2.5 Summary 76
2.3 SOC Architecture 44 References 76

he semiconductor industry has been fueled by Moore’s law where the number of
transistors in a microprocessor has been doubling every 18 to 24 months. With
Tthe possibility of integrating a billion transistors within a single chip, various
methodologies are being developed for system-on-chip (SOC) integration. Unlike pure
digital systems, the need for heterogeneous integration in the system is becoming
important due to the need for mobility-enabled devices. This is creating new challenges
for SOC implementation. In this chapter, the customer requirements for a new class of
application-specific devices that support mobility are discussed. Issues such as
electr-omagnetic interference (EMI), soft errors, environmental concerns, and fault
tolerance that affect such systems from an SOC standpoint are discussed. The
customer require-ments lead to SOC architectures containing embedded processor
cores and multiple cores within the processor. The role of leakage power and the use
of multiple threshold voltage libraries along with hardware and software codesign
concepts are discussed. This is followed by a discussion on SOC design challenges
that include the need for chip-package codesign and hierarchical design flow. The
challenges posed by hetero-geneous integration are also discussed warranting an
SOP approach presented in this book.

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