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                           production quickly and also should provide the necessary hooks to be able to
                           do a quick debug. Most customers also expect that the hardware be bundled
                           with a reference design, lower-level software drivers, and algorithm kernels so
                           that it significantly reduces the development cycle time.
                         6. Application-specific  requirements  In addition to the above-mentioned
                           requirements, which generically apply to most applications, there are certain
                           requirements that are unique to the specific domain.
                           6.1. Electromagnetic interference (EMI) is a key issue in the automotive market
                               and also for mobile handsets. These applications require that the radiation
                               from the device should be under a specified limit and typically specify
                               frequency bands in which the radiation limits are stringent.
                           6.2. Soft errors are the transient defects caused during the operation of the
                               device. The most common form of a soft error is flipping of a memory bit.
                               The severity of this error can vary depending on whether the impacted
                               memory contains a program or data. In applications that use a large amount
                               of memory and have stringent robustness requirements, the soft error rate
                               (SER) needs to be managed by providing on-line bit error detection and
                               correction mechanisms.
                           6.3. The requirement of building lead-free devices is driven primarily by
                               environmental considerations and is increasingly becoming a mandatory
                               requirement across most markets—especially in Europe and Japan. This
                               primarily drives changes in the packaging technology where the bumps
                               with lead content have been used as they enable processing at a lower
                               temperature than the lead-free bumps.
                           6.4. Automotive applications demand systems to have near-zero defective
                               parts per million (DPPM). With the complexity of systems going up both
                               in terms of number of transistors and performance, achieving 0 DPPM is
                               getting increasingly challenging.
                           6.5. For mission-critical applications and also infrastructure-type applications
                               with stringent downtime requirements, fault tolerance is an important
                               requirement. Fault tolerance is the ability to detect faults (either transient
                               or permanent) occurring while the device is in operation and the ability to
                               continue to function correctly in the presence of the fault. The fault tolerance
                               requirements are typically addressed by providing redundancy at the SOC
                               and/or at the system level.




               2.3 SOC Architecture
                    Figure 2.4 shows a generic SOC architecture in terms of the key building blocks. These
                    include embedded processor core(s) with associated data and program memory,
                    application-specific hardware accelerators and coprocessors, customer-specific IP,
                    industry-standard interfaces, external memory controllers, and analog or RF IPs.
                       SOCs address the key customer requirements through the following:
                         1.  Level of integration  Because SOC involves integrating multiple chips on a
                           single device, the cost of the single device is typically less than the cost of
                           multiple chips. Since it reduces the number of devices on the board, the resultant
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