Page 66 - System on Package_ Miniaturization of the Entire System

Intr oduction to System-on-Chip (SOC) 43

enables the performance and level of integration required for the 3G
application, with each new process technology node, the leakage power is
also increasing significantly. Since this impacts the standby time, an
important consideration for these mobile applications, SOC designers need
to employ aggressive power management techniques to reduce leakage
power dissipation.
Power dissipation in the “standby mode” is an important requirement for
automotive applications as well, where a small component of the system needs
to be running continuously even when the car is switched off.
In case of infrastructure devices such as wireless base stations, DSL central
offices, and Cable Modem Termination Systems (CMTS), the system employs
arrays of SOCs to be able to support thousands of communication channels.
The power per channel is hence an important metric for these applications.
While performance is the key optimization vector for these infrastructure
devices, the performance needs to be pushed while taking the power constraints
into consideration.
3. Form factor The form factor is an important consideration for handheld
portable devices such as mobile handsets, MP3 players, and PDAs. These
applications require the system electronics to take up as little board area as
possible. This not only drives SOC integration leading to a reduced number of
devices on the board but also drives aggressive packaging technologies (such
as wafer-scale packaging) to minimize the SOC chip area itself. These
applications and other applications, such as those that require a PCMCIA
(Personal Computer Memory Card International Association) form factor,
demand constraints on the thickness as well. In infrastructure applications,
where the system employs arrays of SOCs on a board and multiple boards are
built into a rack, the form factor is again an important consideration as it drives
the number of channels supported per square inch of board area.
4. Programmability and performance headroom In applications where the
same devices perform different functions (for example, multifunction devices
that operate as a printer-scanner-copier-fax), programmability enables the same
hardware to be used to efficiently implement these different functions.
Programmability is also required for applications that need to support multiple
standards such as, for example, in the video domain where in addition to
MPEG2, MPEG4, H.263, there are applications that use proprietary standards
as well. For applications where the standards are evolving, programmability is
again very valuable as the standards can be supported primarily through
software upgrades. The programmability also allows customization, dif-
ferentiation, and value-added capabilities over the baseline functionality of the
system. This customization hence demands the appropriate performance
headroom to be able to provide additional capabilities while still meeting the
performance requirements of the base functionality. While the programmability
is primarily supported by embedding programmable processor cores into the
system, hardware programmability is also feasible using field programmable
gate array (FPGA) technology.
5. Time-to-market, ease of development, and debug In most markets, being
the first to introduce a system enables a higher market share and higher margins.
This implies that the hardware should be robust to be able to ramp to volume