Page 68 - System on Package_ Miniaturization of the Entire System

Intr oduction to System-on-Chip (SOC) 45

Accelerator
IMX
Viterbi Interface
RISC DSP
Turbo coding
Ethernet
Motion Est USB 1.x/2.x
:
1394 a/b
PCI
PCI express
Utopia
SERDES
Memory UART
I2C
:
Memory Analog IP Ap Specific
Cntrl
ADC/DAC
EMIF PLL Customer IP
DDR Pwr Mgmt :
: :

FIGURE 2.4 SOC architecture.

system implementation is simpler (reduced time-to-market) and also enables a
smaller form factor. The off-chip interconnects in a “multiple chips on a board”
system are replaced by on-chip interconnects within an SOC. This results in a
significantly reduced switched capacitance and, hence, lesser power dissipation.
It also helps improve the performance, as the interconnect delays across the
chip boundaries are significantly higher than the on-chip interconnect delays.
The single-chip DSL modem shown in Figure 2.1 is a good example of how
the increasing level of integration has helped reduce cost and the system
development cycle time.
Wireless handset electronics has over the years gone through the SOC
evolution, where with each generation more and more of the chips on a board
are getting integrated into a single device. From the previous-generation four-
chip solution, the current-generation single-chip solution has (a) a digital
baseband and application processing, (b) a digital RF, (c) an analog baseband
and power management, and (d) a static random-access memory (SRAM)
integrated with (e) a nonvolatile memory either embedded or stacked. This
level of integration is key to reducing the cost, power dissipation, and form
factor—all critical requirements in this market.
This SOC evolution in the wireless handset will continue as more and more
functionality is becoming integrated, including functions such as digital
cameras, wireless local area network (WLAN) and global positioning system
(GPS) connectivity, and digital TV functionality. Figure 2.5 shows the con-
vergence of communications, connectivity, and applications on a handheld
device. The increasing level of integration will enable a single-chip solution for
such devices.