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42 Cha pte r T w o

2.2 Key Customer Requirements
Before we get into the specifics of SOC architecture and SOC development process, it is
important to understand how SOCs address the key customer requirements (Figure 2.3)
across these applications. These include:
1. Cost While it is obvious that a customer cares for lower cost, it is important to
note that the cost applies to the bill of materials (BOM) of the entire system, as
opposed to the cost of the SOC chip alone. For example, consider two scenarios
for a system that performs a data-intensive application such as video and image
processing and hence is built with an SOC and a large amount of off-chip
memory. In one case, the external memory interface of the SOC needs to operate
at 100 MHz, as opposed to 133 MHz in the other case, to be able to achieve the
desired system throughput. The SOC that operates with a 100-MHz interface
will need to employ microarchitectural options such as a wider interface (64 bit
versus 32 bit) or a higher on-chip memory, which can result in a higher SOC
cost. However, at a system level, a 100-MHz interface allows the use of memories
with a lower speed grade, which are significantly cheaper than the memories
required to interface with a 133-MHz interface. Thus at a system level, the
solution that uses a marginally expensive SOC can turn out to be more cost
efficient. Later in this chapter we will discuss how such system- and board-
level considerations can be comprehended during the SOC definition phase.
2. Power dissipation Power dissipation is increasingly becoming a key concern
for portable devices such as mobile phones, personal digital assistants (PDAs),
digital still cameras, and MP3 players because lower power translates to longer
battery life. As mobile phones move from second generation (2G) to 2.5G to 3G,
the computing requirements are increasing at a rapid pace, and with that the
dynamic and switching power dissipation is also increasing. Battery technology
is progressing in terms of energy per dollar, energy per weight, energy per
volume, and so forth, but at a relatively slower pace. This is making low power
an increasingly important requirement. While deep submicron CMOS technology

Lower rost Application-
specific
requirements-
Lower power
dissipation EMI, SER, ....

Customer Ease of
Form development
factor Requirements and debug

Programmability Time-to-market
Performance
headroom

FIGURE 2.3 Customer requirements.