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2.3 Fabrication Techniques                                                     27

                      Commercial software is available with which it is possible to simulate the
                  results of anisotropic etching [18]. This is useful in predicting the outcome from
                  employing various mask designs, and thereby it facilitates design of the layout.



                  2.3.3.3 Silicon Dry Isotropic Etching
                  Dry isotropic etches are not often used for bulk micromachining. However, there
                  are a few examples. Etching in an SF plasma has been used as an alternative to wet
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                  anisotropic etching. The advantage is that a resist mask can be used and the problem
                  of protecting other materials on the wafers is easily overcome. The etch rates are
                  comparable to wet etching, but it is considered to be slow because of the inability to
                  process large numbers of wafers at a time. In another application the high selectivity
                  of silicon dry isotropic etching in an SF /O plasma against etching aluminum and
                                                      6  2
                  silicon dioxide is utilized. By undercutting the aluminum after completion of a
                  CMOS process, suspended structures can be made.


                  2.3.3.4  Silicon Dry Anisotropic Etching

                  Anisotropic etching of silicon has been used in the microelectronics industry for
                  many years. The main applications have been in forming deep trench capacitors for
                  memory devices and in constructing isolation trenches between active devices.
                  However, for these applications the etch depth and aspect ratio used have been at
                  most 10 µm and 10:1, respectively. For MEMS applications there is a requirement
                  for much deeper trenches, often through the thickness of the wafer, and in some
                  cases higher aspect ratios are needed. The dry etch process that can achieve this is
                  called DRIE and there are currently two different processes being used by equip-
                  ment manufacturers. In each case the deep anisotropy is achieved by passivation of
                  the sidewalls of the trench as it is etched. One process uses cryogenic cooling of the
                  wafer to liquid nitrogen temperatures, which, it is believed, causes condensation of
                  the reactant gases on to the silicon surface, thus passivating it. On horizontal sur-
                  faces, such as the bottom of trenches, this condensate is removed by ion bombard-
                  ment and these surfaces are therefore etched. SF is typically used because of the
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                  high etch rates that can be achieved. The passivation can be enhanced by the addi-
                  tion of oxygen to the plasma, which results in oxidation of the sidewalls. Possible
                  problems with the cryogenic approach are in maintaining the temperature of struc-
                  tures during the etch process. Some structures may become thermally isolated
                  resulting in adverse thermal stress. The other process is one patented by Bosch
                  which uses alternate etch and passivation steps [19]. The passivation is achieved by
                  deposition of a polymer using C F as a source gas. Concurrent with this deposition
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                  step is some ion bombardment, and this prevents the formation of polymer on the
                  bottom of the trench. The polymer on the bottom of the trench is, in any case,
                  removed by energetic ions during the following etch step done in SF . The cycle time
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                  for this deposition/etch process is typically about 5 seconds with etch rates of
                  between 1.5 and 4 µm/min. Aspect ratios of more than 40:1 can be obtained. A limi-
                  tation encountered with both DRIE processes is the etch rate dependence on trench
                  width. The etch process is diffusion limited and for trench widths less than 60 µm
                  the etch rate becomes progressively slower as the trenches become narrower. This
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