Page 232 - A Practical Guide from Design Planning to Manufacturing
P. 232

204   Chapter Seven

          The length of the transistor is the spacing between the source and
        drain. This can be specified as L gate , the actual width of the poly gate,
        or as L eff , the effective separation between the source and drain dopants
        under the gate. L gate is a physical parameter that can be measured with
        an electron microscope, but it is L eff that will actually determine how
        much current the transistor produces. Because the dopants of the source
        and drain diffuse through the silicon underneath the gate, L is always
                                                               eff
        smaller than L gate . When we speak of Moore’s law driving the semicon-
        ductor industry forward by making transistors smaller, we are prima-
        rily taking about reducing the minimum transistor length.
          As the transistor length is reduced, the thickness of the gate oxide (T )
                                                                       ox
        must also be reduced for the gate to have good control of the channel.
        If T is not scaled, there could be significant current even in the cutoff
            ox
        region. Moving the gate physically closer to the channel makes sure
        the transistor can be effectively turned off. The width of the transistor
        is determined by the size of the source and drain regions. A wider chan-
        nel allows more current to flow in parallel between the source and drain.
          The factor e ox  measures the electric permittivity of the gate oxide
        material. This will determine how strongly the electric field of the gate
        penetrates the gate oxide and how strong it will be when it reaches
        the silicon channel. Finally, the factor m is a measure of the mobility of
        the charge carriers. The drift velocity of the carriers across the channel
        is estimated as their mobility times the electric field between the source
        and drain. Together these five factors, the transistor length, width,
        oxide thickness, oxide permittivity, and carrier mobility, determine the
        b value of a transistor.
          Of these five, the circuit designer has only control of the transistor’s
        length and width. Most transistors on a die will be drawn at the mini-
        mum allowed channel length in order to produce the most current and
        provide the fastest switching. Some sequential circuits will make use of
        transistors as “keepers,” which only hold the voltage level of a node when
        it is not being switched by other transistors. These keeper devices may
        be intentionally drawn with nonminimum lengths to keep them from
        interfering with the normal switching of the node.
          The circuit designer increases a transistor’s switching current by increas-
        ing the width, but this also increases the capacitive load of the gate.
        Increasing the width will make the drain of this transistor switch faster,
        but the transistor driving the gate will switch more slowly. Also, a wider
        transistor requires more die area and more power. Much of a circuit
        designer’s job is carefully choosing the widths of transistors to balance
        speed, die area, and power.
          The manufacturing process determines the oxide thickness, oxide per-
        mittivity, and charge mobility. Modern processes use gate oxides less than
        10 molecules thick, so further scaling of the oxide may be impractical.
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