Page 101 - Op Amps Design, Applications, and Troubleshooting
P. 101

84     AMPLIFIERS


               this situation can occur in the circuit shown in Figure 2.20. To perform this calcu-
               lation, we want to determine the worst-case combination of input signals. First
               observe that V l and F 4 are of opposite polarity and thus tend to reduce each
               other's effect in the output. A worst case would be when V^ is zero or when V : is
               maximum (3 volts DC). Let us evaluate them with Equation (2.1) to determine the
               worst-case combination.








                    From these calculations we can see that if V^ were reduced to zero, F 4 would
               produce +1.7 volts in the output. On the other hand, if FI were set for maximum
               (3 volts DC), the net output voltage would be the difference between the V r
               produced and F 4-produced outputs. This worst-case output voltage is simply -7.8
               + 1.7, or-6.1 volts.
                    Now we must consider the effects of the AC signals v 2 and v 3. The worst-case
               output condition will occur when these two inputs hit their peak values simulta-
               neously and have the same polarity as V}. The output voltages produced individ-
               ually by v 2 and u 3 are







                    The net effect of Vi, v^ v 3, and V 4 can be found by adding the individual out-
               put values (Superposition Theorem).









                    Since this worst-case value is less than our maximum output voltage limit
               (±13 volts typically), we should not have a problem. In extreme cases, however,
               we may have a potential problem. Recall that the output limits of ±13 volts were
               obtained by using typical performance values for the 741. If worst-case values
               are used, we will find that the limits fall to ±10 volts under worst-case condi-
               tions. If this situation were to occur at the same time our inputs were all at their
               maximum values, we would drive the amplifier into saturation and produce a
               clipped output. If this is a serious concern for our particular application, we can
               reduce R F slightly to prevent the combined signals from driving the output to
               saturation.
               Output Impedance. The output impedance of the summing amplifier can be
               estimated as follows:
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