Page 324 - Op Amps Design, Applications, and Troubleshooting

302 SIGNAL PROCESSING CIRCUITS

For the circuit shown in Figure 7.8, we estimate the highest frequency of operation
(for a 1-percent overshoot) as

We can get higher operating frequencies either by accepting a higher overshoot or
by selecting an op amp with a higher slew rate.

Maximum Input Signal. During the time that DI (Figure 7.8) is reverse-
biased, the full input signal is felt on the (-) input of the op amp. The manufac-
turer's data sheet indicates that the maximum voltage that should be applied to
this input is equal to the supply voltage. So, in the case of the circuit in Figure 7.8,
the peak input voltage should be limited to 15 volts.

Input Impedance. The instantaneous input impedance will vary depending
upon whether D l is forward- or reverse-biased. During the time it is forward-
biased (worst-case input impedance), the input impedance is determined by the
value of Rj because the (-) input is a virtual AC ground point during this time.
When diode D\ is reverse-biased, the input impedance is the sum of R 5 and the
input impedance of the following stage. As the first value will always be lower, we
will compute minimum input impedance as

For the circuit shown in Figure 7.8, the minimum input impedance is simply

Output Impedance. The output impedance also varies depending upon the
conduction state of Dj. If diode Dj is conducting, then the output impedance is
nearly the same as the output impedance of the op amp itself, which is a very low
value. On the other hand, when D l is reverse-biased, the output impedance is
equal to the value of Rj. Since mis latter value is always higher, we will use it to
estimate the output impedance.

By using this value in the design of subsequent stages, we are assured that the sig-
nal will couple faithfully between stages on both alternations. In the case of the
circuit shown in Figure 7.8, the maximum output impedance is simply