Page 72 - Phase-Locked Loops Design, Simulation, and Applications
P. 72

MIXED-SIGNAL PLL ANALYSIS   Ronald E. Best                                              50
               proportional to phase error but to the sine of phase error, the last equation can be shown to
               read actually 1



                                                                                           (3.38)


               Because the sine function cannot exceed unity, the maximum rate of change of the reference
               frequency that does not cause lock-out is



                                                                                           (3.39)

               This result has two consequences:

               ■ If the reference frequency is swept at a rate larger than   , the system will unlock.
               ■ If the system is initially unlocked, it cannot become locked if the reference frequency is
                 simultaneously swept at a rate larger than   .

                 Practical experience with PLLs has shown that Eq. (3.39) presents a theoretical limit that is
               normally not practicable. If the reference frequency is swept in the presence of noise, the rate
               at which an initially unlocked PLL can become locked is markedly less than        . A more
               practical design limit for      is considered to be 1



                                                                                           (3.40)




               Steady-State Error of the PLL

               The following discussion assumes that a phase detector with voltage output is used. The
               results are also valid, however, for charge  pump PDs, but in the  equations some minor
               modifications would have to be made (for example, setting K  instead of K , and so on).
                                                                                       d
                                                                          P
                 In control systems, the steady-state error is defined as the  deviation of the controlled
               variable from the setpoint after the transient response has died out. For the PLL, the steady-
               state error is simply the phase error θ (∞). To see how the PLL settles on various excitation
                                                    e
               signals applied to its input,  we will calculate the steady-state error for a phase step, a
               frequency step, and a frequency ramp. When the input phase θ (t) is given, the phase error θ
                                                                            1                            e
               (t) is computed from the error-transfer function H (s) as defined in Eq. (3.8). It turns out that
                                                               e
               the steady-state error depends largely on the number of “integrators” present in the control
               system—in other words, on the number of poles at s = 0 of the open-loop transfer function.
               Using Eq. (3.8) and the



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