Page 54 - Power Electronics Handbook

Thyristors 47

x v2
R= (1.17)
PG(AV)
Therefore for V equal to 5 V and PG(~~ to 0.5 W, R equals 12.5 P
equal
for a 100% duty cycle and 6.25 P for a 50% duty cycle. R is the minimum
value of the trigger source impedance. Plotting the above two load lines on
Figure 1.25(f), they are seen to be tangential to their respective maximum
gate power curves. Gate source impedance is usually chosen to give an
operating load line between this line and the area bounded by the
minimum firing gate voltage and current.

1.93 Thyristor construction
Several different thyristor structures are used to achieve various
performance parameters. Figure 1.26(a) shows a conventional arrange-
ment in which the edges of the silicon chip are bevelled to reduce stress at
the junctions and so enable the voltage rating to be increased. An
alternative technique for increasing voltage rating is to increase the
thickness of the control layer, but this also results in an increased voltage
drop across the thyristor.
Figure 1.26(b) shows what is known as the shorted emitter thyristor
structure. It is used for applications which require a high dv/dt rating. In
this structure the current generated by a rapidly rising voltage flows
directly to the cathode, so that only a small proportion of it crosses the p-n
junction as gate current.
It was mentioned earlier that when a thyristor turns on the initial
conducting area is localised around the gate lead and then spreads
relatively slowly over the whole silicon chip. The turn-on time of the whole
chip is therefore relatively long, resulting in current crowding and a limit on
the di/dt rating of the thyristor. Where a large value of this rating is required
special constructional techniques must be used. The most direct is to use an
interdigitated gate structure, as shown in Figure 1.26(c), so that several areas
around the chip periphery are triggered simultaneously. Unfortunately this
also means that a much larger gate current is required since the gates are, in
effect, connected in parallel. This disadvantage is overcome by the
regenerative gate and amplifying gate structures.
The amplifying gate works on the principle shown in Figures 1.26(d) and
1.26(e). A low-power auxiliary thyristor is used to trigger the main
high-power thyiistor. The auxiliary thyristor is triggered by an external
source, the power for the main thyristor being derived from the load which
is being driven by the main thyristor.
The regenerative gate structure of Figure 1.26(f) makes use of a
phenomenon known as ‘emitter lip’ resistance, which acts as an
impediment to the rapid turn-on of conventional thyristors. When a device
is initially triggered most of the anode current tends to be squeezed
through a small turned-on portion near the gate, and this effect is worsened
by the fact that all thyristors have an ‘emitter lip’ between the cathode n
layer and the cathode plate. This lip presents impedance to current flow, as
shown in Figure 1.26(g), so that if the anode current is increasing rapidly a