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380             Renewable Energy Devices and Systems with Simulations in MATLAB  and ANSYS ®
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            14.4.2  Solid-State DC Circuit Breaker
            According to the fault current analysis mentioned earlier, a solid-state breaker is designed for Super
            UPS. A two-series-opposing insulated gate bipolar transistor (IGBT) structure is used in it. Because
            the large inductor exists in the short-circuit loop, a metal oxide varistor (MOV) is used to protect the
            IGBT by limiting its voltage stress. The structure of the solid-state DC circuit breaker is shown in
            Figure 14.26. This structure has been used in [24–28].
              The design of the breaker for 100 kW converter module includes three main steps, such as selec-
            tion of MOV, selection of IGBT voltage level, and selection of IGBT current capacity.

               1. The first step is the selection of MOV for the breaker. Because the rated voltage of breaker
                 is 375 V, EPCOS MOV S20K300E2 is selected. Its rated operation voltage is 385 V, and
                 the varistor voltage is 470 V (1 mA).
               2. The second step is the voltage level selection of IGBT. The rated operation voltage of IGBT
                 is also 375 V. According to the datasheet of MOV, when the current of MOV reaches 1500
                 A, MOV can limit the voltage at 950 V. Because the parasitic inductor between IGBT and
                 MOV exists, the voltage stress of IGBT is a little higher than 950 V. So, the 1200 V IGBT
                 is selected.
               3. The last step is the current capacity selection of IGBT. The rated current of breaker is 133 A
                 for a 100 kW module. The trigger current of the breaker is set at ten times of rated current
                 normally. So the trigger current is set at 1500 A. The IGBT can handle three times of rated
                 current within 20 μs. So the current capacity of IGBT is selected at 500 A.


              A snubber circuit can also be added to suppress the spike of a breaker’s voltage stress. The most
            typical snubber circuit is RCD.
              The solid-state breaker is installed between the power conversion module and the DC bus as
            shown in Figure 14.25. The control scheme of solid-state DC breaker is shown as Figure 14.26. It
            consists of detection unit, control unit, and drive unit. The detection unit detects the short current
            within several microseconds and produces the fault signal. The control unit determines the state of
            the breaker according to the fault signal and enable signal from the Super UPS system.
              When a short-circuit fault occurs in a converter module, the voltage between the node C and node
            E of the breaker in that module will increase. Then the fault current is detected based on this voltage.
            The voltage is extracted to produce fault signal. Then the control unit disables two breakers in this
            module based on the fault signal from the detection unit.
              The detailed protection logic is shown in Figure 14.26. The fault signals of four IGBTs are con-
            nected to an AND gate to generate the protection signal. Then the protect signal and enable signal
            are connected to an AND gate to generate the driver signal. The driver signal is used to control the
            solid-state breaker. Normally, the fault signal of IGBT is a high level. If one IGBT has a short-circuit
            fault, the fault signal turns to a low level. And the protect signal also turns to a low level. Then, the
            driver signal turns to a low level when the enable signal is high. Finally, all IGBTs in the breaker
            are disabled.
              The test waveforms of the solid-state breaker under the two types of fault are provided in
            Figure 14.27. The specifications of the short-circuit test are shown in Table 14.2. And the test circuit
            is shown in Figure 14.22. The waveform under short-circuit fault between positive bus and neutral
            bus is shown in Figure 14.27a. It can be seen that the voltage stress is 911 V at the fault current 1200
            A in this kind of fault. The waveform under short-circuit fault between the positive bus and nega-
            tive bus is shown in Figure 14.27b. The voltage stress of the positive bus breaker is 940 V, and the
            voltage stress of the negative bus breaker is 890 V. Furthermore, the test results about the solid-state
            breaker are given in Figure 14.28. It can be seen that the solid breaker is safe enough based on the
            design of the solid-state breaker.
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