Page 160 - Six Sigma for electronics design and manufacturing

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Determining the Manufacturing Yield and Test Strategy
are “covered” by a test, with 100% representing test coverage of all
possible defects within a particular PCB defect category. There are
many factors affecting test coverage:
“Nodal access” refers to physical access to the nodes of a circuit by a
test probe. When there is less than 100% nodal access, the coverage
of circuit functionality is lessened. It is dependent upon the tech-
nology of the circuitry of the PCB. Coverage of analog circuitry in-
creases approximately linearly with nodal access, whereas cover-
age of digital circuitry increases in step increments, depending on
whether the node controls important digital pins such as reset pins.
Thus, digital circuits have a higher number of critical nodes, i.e.,
nodes that control or affect a large amount of functionality.
The manufacturing technology of a PCB includes features that can
affect nodal access, such as the use of surface mount technology
(SMT) and the component population density of the PCB. Through-
hole (TH) circuits have about 100% nodal access; SMT PCBs can
have significantly less. Double-sided PCBs impede nodal access,
since using the underside of the PCB for circuitry imposes a compe-
tition for PCB “real estate” between that circuitry and the test
routes needed for accessing the top of the PCB. High-density PCBs
result in less access, due to difficulty in probing the test pads.
Strategic business decisions concerning the amount of time and fi-
nancial resources budgeted for test and fixture development. A
model for this effect would involve two stages: the first would as-
sume a minimal test development time of approximately two weeks
to develop 60–70% of test programs; the second stage would allow
additional time of two to four weeks to complete the remaining
tests.
Design for test efforts (DFT). Test coverage can be increased by
DFT efforts and built-in self-test (BIST) features. These are tests
embedded inside the PCBs. The amount of memory allotted for
BIST is a good indicator of good test coverage.
4.4.6 Bad and good test effectiveness
Bad and good test effectiveness values are the percentage of PCBs
that are properly distinguished as bad or good. This measure differs
from test coverage, which is determined by the percentage of defects
covered. Since both are measures of defect detection, factors that in-
crease test coverage will also increase bad test effectiveness.
Good test effectiveness is a measure of properly passing good PCBs.
Factors that affect good test effectiveness include proper fixturing and