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Determining the Manufacturing Yield and Test Strategy
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quently, it allows for a system to manage the removal of these defects
through good testing strategies in a large product or system with the
tools mentioned in this chapter.
4.6 References and Bibliography
Byle, F. “Using Industry DPMO Standards—An In-depth Look at IPC 9261
and IPC 7912.” In Proceedings of SMTI International, Chicago, IL, Sep-
tember 2001, pp. 507–510.
Fink, D. and Beaty, H. Standard Handbook for Electrical Engineers, 12th ed.
New York: McGraw-Hill, 1997.
Hewlett-Packard Company. “HP 3070 Series II Board Test Family, Test
Methods and Specifications,” 1995.
Higaki, W. “Minesweeper Project Proposal.” Measurement Systems Newslet-
ter, 15, 1997.
IPC-7912. “Calculation of DPMO and Manufacturing Indices for Printed
Board Assemblies.” Northbrook, IL: IPC, June 2000.
IPC-9261. “Calculation of Defects per Million Opportunities (DPMO) in Elec-
tronic Assembly Operations.” Northbrook, IL: IPC, January 2002.
Phung, N. “Control Charts for DPMO.” Circuits Assembly, September 1995, p.
40.
Ungar, L., “Board Level Built-in Test: The Natural Next Step.” Nepcon West
Proceedings, 1997.
Rowland, R., “DPMO and IPC 7912.” Surface Mount Technology Magazine,
March 2001.
Texas Instruments. “Six-Sigma—Reaching Our Goal, Guiding Principles for
Counting Opportunities.” Corporate statement, September 1995.
Woody, T. “DPMO, A Key Metric for Process Improvement in PCB Assembly.”
Proceedings of SMTI International, Chicago, IL, September 2001, pp.
503–506.