Page 144 - Troubleshooting Analog Circuits

VFCs and FVCs Frequently Find Favor 131

different ground systems. The VFC can cover a wide range with 14 to 18 bits of
dynamic range. The less expensive VFCs are slower; the faster ones can be expensive.
Most VFCs have excellent linearity, but the linearity depends on the timing capacitor
having low dielectric absorption. Teflon makes the best VFC timing capacitors, but
polystyrene, polypropylene, and ceramic capacitors with a COG characteristic are
close behind. (Refer to the LM131LM331 data sheet, for examples and notes.)
Trimming a VFC to get a low temperature coefficient is not easy because the
overall temperature coefficient depends on several components, including the refer-
ence, as well as various timing delays. See Ref. 4 for VFC trimming procedures or, at
least, to appreciate how much effort is involved when you buy a well-trimmed unit.

The Other Way Back
Frequency-to-voltage converters (FVCs) are often used as tachometers or in conjunc-
tion with a VFC and an optoisolator to provide voltage isolation in an analog system.
FVCs are about as linear as VFCs and about as drifty, so the temperature trimming
problem is the same as for a VFC. One exception is if you’re using cascaded
VFC/FVC pairs in which both circuits are in the same location and at the same tem-
perature. In that case, you can often get by with trimming only one of the pair. or by
just making sure the TCs match!
Another problem with FVCs is that you often want the response to be as fast as
possible but need to keep the ripple low. The design of a filter to accomplish both
objectives will, of course, be a compromise. My rule of thumb is that you can keep
the ripple down to about 0.01% of the Vfullscale, but with the simplest filters, you must
keep the carrier at least 100 times the Fmin. With more sophisticated filtering, such as
two Sallen-Key filters cascaded, the -3-dB point can be 1/10 of the slowest carrier. For
example, with a carrier frequency in the range 5-10 kHz, the signal can go from DC
to 500 Hz (Ref. 5). If you need still faster response, see Ref. 2, which shows in a cook-
book circuit how to use a simple phase-locked loop to make a surprisingly quick FVC.

S/H Circuits: Electronic Stroboscopes

A VFC produces an output proportional to the average value of its analog input
during the conversion. If you need to digitize rapidly changing signals, for example,
to reconstruct waveforms in the digital domain, you need a different type of ADC and
you almost always have to precede it with a sample-and-hold circuit. Designing S/H
circuits is a complicated, challenging endeavor. Meeting exacting specs often requires
an expensive module or hybrid circuit. A major problem of S/H circuits is dielectric
absorption, or “soakage,” in the hold capacitor (Ref. 6). If you need to run a relatively
short sample time with a long hold time and if the new output voltage can vary con-
siderably from the previous sample, the soakage may be your biggest problem. For
example, if an S/H circuit acquires a new voltage for 5 ps and then holds it for 500
ps, you can tell approximately what the previously held signal was because the new
V,,, can shift by 2-3 mV-the amount and direction depend only on the value of the
previous signal. And that’s for an expensive Teflon hold capacitor-most other ca-
pacitors have soakages three to five times worse. If the timing, frequency, and rep-
rate don’t change, you may be able to add a circuit to provide some compensation for
the soakage (Ref. 7); but the problem isn’t trivial, and neither is the solution.
Cascading two S/H circuits-a fast one and a slow one with a big hold capacitor-
won’t help the soakage but will tend to minimize the problem of leakages.
Some people wish that a S/H circuit would go from sample to hold with a negligible