Page 139 - Troubleshooting Analog Circuits

I26 IO. The AnaloglDigital Boundary

parts if you overdrive the inputs much below ground. Refer to the letter by Mr. J.
Koontz in Chapter 13.

A Time to Ask Probing Questions

A number of years ago, I was watching the negative transition of an ordinary TTL
gate, and I was especially concerned by the way it was overshooting to -0.4 V. I set
up an attenuator with 1 pF in the input leg (Figure 10.5), and was astounded to see that
if I looked at the waveform with an ordinary (1 1-pF) probe, the overshoot occurred,
but if I disconnected the probe from the gate output and connected it to the attenuator
output, the overshoot went away. So, even if you use a fairly high-impedance probe,
you should always be prepared for the possibility that by looking at a signal, you can
seriously affect it-even if what you’re looking at is as mundane and supposedly
robust as a lTL output. Consequently, you should be prepared to build your own
special-purpose probes, so you can see what’s really going on.
When I work with digital ICs, I would be easily confused if I did not sketch the
actual waveforms of the ICs to show their relationships to each other. So I sketch
these waveforms on large sheets of quadrille paper (1/4-in. grid) to produce some-
thing I call a “choreography” because it maps out what I want all the signals to do
and exactly where and when I require them to dance or pirouette.. . . When the system
gets big and scary, I sometimes tape together two or three or four sheets horizontally
and as many sheets as I need vertically. Needless to say, I am not very popular when I
drag one of these monsters up to the copying machine and try to figure out how to
make a copy. Figure 10.3b is a small example.
NOTE, when I first published this Figure 10.3b in EDN magazine in 1989, the
sketch was printed with an error; some of the pulses were positioned at the wrong
time. And did EDN make the error? Not at all! I drew it wrong and the error wasn’t
caught until after publication when a kid engineer suggested it might be erroneous.
He was right. How embarrassing. It would have been even worse if a whole lot of
people had called to correct me. That just goes to show, if you stand on a big soapbox
and rant and holler, people will often think you know what you are talking about.
They stop looking for mistakes.. . .and that’s a mistake. Bigwigs make mistakes-
and wanna-be big-wigs, too. Embarrassing.. . .
Maybe the guys who design really big digital ICs can get along without this chore-
ography technique; maybe they have other mnemonic tools, but this one works for
me. I first developed this approach the time I designed a 12-bit monolithic ADC, the
industry’s first, back in 1975. I had this big choreography, about 33 inches square,
and the circuit worked the first time because the choreography helped me avoid
goofing up any digital signals. Right now I’m working on a system with one chore-
ography in nanoseconds and tenths of nanoseconds linked to a second one scaled in
microseconds and a third one scaled in seconds. I hope I don’t get lost.
Of course, this tool is partly for design, but it’s also a tool for troubleshooting-
and for planning, so you can avoid trouble in the first place.

DIA Converters Are Generally Docile

D/A converters are pretty simple machines, and they can usually give excellent re-
sults with few problems. If the manufacturer designed it correctly and you are not
misapplying it, a DAC usually won’t cause you much grief.
One area where DACs can cause trouble, however, is with noise. Most DACs are
not characterized or guaranteed to reject high-frequency noise and jumps on the