Page 77 - An Introduction to Microelectromechanical Systems Engineering
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56                                                       Processes for Micromachining

                    The coefficient of thermal expansion of the glass substrate is preferably matched
                 to that of silicon in order to minimize thermal stresses. For example, Corning Pyrex ®
                                                                   −6
                 7740 has a coefficient of thermal expansion of 3.2 × 10 /°C; silicon’s coefficient is
                         −6
                 2.6 × 10 /°C at room temperature, rising to 3.8 × 10 /°C at 300°C. Sputtered,
                                                                   −6
                 evaporated, or spin-on glass films containing sodium can also be used to anodically
                 bond two silicon substrates. In this case, the required voltage to initiate the bond
                 process decreases to less than 100V due to the thinness of the glass layer.

                 Silicon Direct Bonding
                 Silicon direct bonding, also known as silicon fusion bonding, is a process capable of
                 securely joining two silicon substrates. It emerged as an important step in the devel-
                 opment of SOI technology during the 1980s for high-frequency and radiation-hard
                 CMOS applications [17]. SOI wafers made by silicon direct bonding are commer-
                 cially available today from many vendors. The concept was quickly extended to the
                 manufacture of pressure sensors [18] and accelerometers in the late 1980s and is
                 now an important technique in the MEMS toolbox.
                    Silicon direct bonding can be performed between two bare single-crystal silicon
                 surfaces or polished polysilicon. One or both surfaces may have thermal or other
                 smooth silicon dioxide or silicon nitride on them. For uniform and void-free bond-
                 ing, the surfaces must be free of particles and chemical contamination, flat to within
                 about 5 µm across a 100-mm wafer, and smoother than about 0.5- to 1-nm RMS
                 roughness [19] (silicon wafers out of the box are typically on the order of 0.1–0.2
                 nm RMS roughness).
                    The direct bonding process starts with cleaning and hydration of the surfaces.
                 The following is a typical sequence, although one or more steps may be swapped or
                 even skipped, as long as the resulting wafers are clean and hydrated. First, the wafers
                 are precleaned in a hot Piranha (sulfuric acid and hydrogen peroxide) solution.
                 Next, they are dipped in a dilute HF solution to etch away the native oxide (or ther-
                 mal oxide surface) and remove contaminants trapped in the oxide. This is followed
                 by an RCA-1 clean (hot ammonium hydroxide and hydrogen peroxide solution)
                 clean, intended to remove organics. Finally, an RCA-2 clean (hot hydrochloric acid
                 and hydrogen peroxide solution) is done to remove metal contamination. All of the
                 hot hydrogen-peroxide solutions form the hydroxyl (–OH) groups on the surface
                 needed for bonding. This is known as hydration. The bond surfaces are then care-
                 fully brought into contact and held together by van der Waals forces [20]. An anneal
                 at 800° to 1,100°C for a few hours promotes and strengthens the bond according to
                 the reaction

                                                                +
                              Si − O− H••• H−  O−  Si →  Si − O− Si H O
                                                                    2
                    In some cases, features on the two bond surfaces must be aligned to each other
                 prior to bonding. For instance, a cavity in one wafer may be joined to an access port
                 provided through the second wafer. Special equipment is necessary to perform the
                 alignment and bonding. SÜSS MicroTec and EV Group, two major equipment
                 manufacturers, use similar schemes to align and bond. The wafers are sequentially
                 mounted in a special fixture and aligned with the two bond surfaces facing each
                 other in a manner similar to double-sided alignment in lithography. A mechanical
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