Page 235 - Analog and Digital Filter Design
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232 Analog and Digital Filter Design




                       The quality  of  an impedance matching  network is described in terms of  the
                       voltage standing wave  ratio (VSWR)  or in terms of  the return loss obtained.
                       The relationship between VSWR and return loss is simple, since both are related
                       to the reflection coefficient (p):






                       Note that the VSWR equation is usually written with the denominator elements
                       transposed,  but this results in a negative number for reflection coefficients less
                       than unity.

                                 Z-Ro
                              p=-
                                 Z+Ro

                       The return loss = 20. log IpI.
                       Suppose the characteristic impedance R,, is 50 Q and the load is Z = 50 + j30.


                                     50 + j30 - 50  -  j30
                              p=-p=
                                     50+ j30+50 - 100+ j30
                                   30  90   = 0.28735 L 73.3
                              ’=  104.4116.7

                       Thus the return loss is 20. log 0.28735 = -10.8dB.

                                         1.28735
                              TheVSWR=-=1.806
                                         0.71265

                       To find the impedance Z, given the  VS WR, use the following equations:

                                  s-l
                              IPI = -
                                  s+l
                                     l+P
                              Z=Ro.-
                                     1-P

                       For example, suppose the circuit has a VSWR of 1.4 in a 50 st system. The reflection
                       coefficientp=0.4/2.4=0.1667, and theimpedanceZ=50x 1.667/0.8333= 100Q.


                       Series and Parallel Circuit Relationships
                       Before discussing the design of an impedance matching network I would like to
                       review the relationship between series and parallel circuits. In this case I am con-
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