Page 332 - Analog and Digital Filter Design
P. 332

329
                                                        Filters for Phase-Locked Loops




                 Analog versus Digital Phase-Locked Loop

                       An  analog phase-locked  loop uses  an  analog phase  detector  and,  usually, a
                       voltage-controlled oscillator having a  sinusoidal output. Analog phase-locked
                       loops  are most  common  in  radio  systems where high-frequency outputs are
                       required.

                       Digital phase-locked loops use logic gates as a phase detector, often arranged
                       as an edge triggered flip-flop. The voltage-controlled oscillator output is usually
                       a square wave. Digital phase-locked loops are used in frequency synthesizers and
                       tone decoder circuits.




                 Practical Digital Phase-Locked Loop


                       Now I will describe how to make a practical digital phase-locked loop circuit.
                       This will use a passive lead-lag network, so the component  values for R1, R2,
                       and  C need to be found. It will  also use  a common CMOS (Complementary
                       Metal Oxide Silicon) logic phase-locked loop integrated circuit, the 74HCT4046.

                       The  circuit  I  am  going  to  consider  is  a  frequency  synthesizer,  producing  a
                       frequency N  times that  of  the  input  signal. The bandwidth  of  the loop filter
                       must  be  much  smaller than  the  frequency used  for  comparison  in  the  phase
                       detector,  to  prevent  modulation  of  the  voltage-controlled  oscillator.  The
                       damping factor of  the system will be set at  l/fi to ensure stability and a rea-
                       sonable impulse response. Now select R1 and C to provide a suitable bandwidth,
                       approximately given by 1/(R1.  C) in rad/s. The values of R1 and C, and the loop
                       constants (N, K@J, KO) can be used to find a value for R2 that gives the correct
                       damping. This derivation will now be given.

                       As described earlier, the equations for a lead-lag network are:


                              uLp = 1/(R1+ R2).C, in rad/s.
                              wv =J(K@.Ko.w,,),in  rad/s

                                                               K@  . KO
                              uLp can be replaced to give: us.
                                                         =


                                  2
                              C-"[R2.C+(&)]           , where N is the loop divider ratio.

                       Now, simplify the equation for R2 by letting <= 0.7071 or 1/42, so that   = 112.
   327   328   329   330   331   332   333   334   335   336   337