Page 135 - Bebop to The Boolean Boogie An Unconventional Guide to Electronics Fundamentals, Components, and Processes

11 6 Chapter Eleven

When set is placed in its active (logic 1) state m, the -4, output from
the second gate is forced to O m. This O on -q is fed back into the first
gate Wr?' and, as both inputs to this gate are now 0, the output is forced
to I m. The key point to note is that the I on q is now fed back into the
second gate m.

When the set input returns to its inactive (logic 0) state 116, the 1 from
the q output continues feeding back to the second gate j-J7-J' and the -q
output continues to be forced to 0 m. Similarly, the 0 on the -q output
continues feeding back into the first gate m, and the q output continues
to be forced to 1 m. The end result is that the 1 at causes the 0 at
which is fed back to 11917, and the O on the reset input combined
with the O at causes the I at which is fed back to j-J7-J'.
Thus, the latch has been returned to its set condition and, once again, a
self-sustaining loop has been established. Even though both the reset and set
inputs are now inactive, the 01 output remains at 1, indicating that set was the
last input to be in its active state. Once the function has been placed in its set
condition, any subsequent activity on the set input will have no effect on the
outputs, which means that the only way to affect the function is by means of
its reset input.
The unstable condition indicated by the fourth row of the RS latch's truth
table occurs when both the reset and set inputs are active at the same time.
Problems occur when both reset and set return to their inactive states simulta-
neously or too closely together (Figure 11-1 1 ).
When both reset and set are active at the same time, the 1 on reset [Ti-?'
forces the q output to O and the I on set forces the -q output to
0 m. The 0 on 01 is fed back to the second gate Ft7, and the 0 on -9 is
fed back to the first gate m.

Now consider what occurs when reset and set go inactive simultaneously
(WE and mj', respectively). When the new 0 values on reset and set are
combined with the 0 values fed back from and -q m, each gate
initially sees both of its inputs at O and therefore both gates attempt to drive
their outputs to 1. After any delays associated with the gates have been satisfied,
both of the outputs will indeed go to I.
When the output of the first gate goes to 1, this value is fed back to the
input of the second gate. While this is happening, the output of the second gate