Page 147 - Complete Wireless Design

Amplifier Design

146 Chapter Three

There are also many times when we must convert a series resistance and
reactance into a parallel resistance and reactance. This is in order to make a
certain impedance-matching problem easier to solve. Below is another tech-
nique for doing this.
To convert from series to parallel, using the example of Figs. 3.45 and 3.46
(f 1.5 GHz):
C
1. Find the Q of the series circuit:

X
S
Q or Q 2.62
R
S
2
2. If Q 10, use R (Q 1)R 28 ohms
P S
2
3. If Q 10, use R Q R
P S
4. X R ÷ Q 10.8 ohms (Note: Q Q Q )
P P P S P
5. C 1 ÷ 2 fX
P P
6. L 2 fX
P P
To convert from parallel to series using Figs. 3.45 and 3.46:
1. Find Q R ÷ X
P P
2
2. R R ÷(Q 1) if Q 10
S P
3. R R ÷ Q 2 if Q 10
S P
2
4. X R (X R /X 2 R )
S P P P P P
5. C 1 ÷ 2 fX
S S
6. L 2 fX
S S
Selective mismatching. Designing an amplifier for a specific gain can be
accomplished by selective mismatching at either its input or output port. This
is an important technique, since we do not always require all of the gain that
can be supplied by a particular transistor. Thus, a stage can be designed for a
certain gain (or NF) by actually not matching the load to the source by some
predetermined amount. This technique is a powerful and legitimate one, but
it is wise to attempt it only when we are using an unconditionally stable tran-
sistor. However, if the extra parts can be afforded in the amplifier design, fixed
attenuators can also be adopted for this purpose where noise figure is not a
concern.
To carry out selective output mismatching of a transistor amplifier in order
to lower its gain by mismatch losses, follow this procedure (Fig. 3.48):

1. Choose gain desired (G ) for the amplifier.
DESIRED
2. Calculate M G (dB) G (dB)
L MAX DESIRED
where M mismatch loss, dB
L
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